octeontx2-pf: Fix adding mbox work queue entry when num_vfs > 64
authorGeetha sowjanya <gakula@marvell.com>
Sat, 25 Nov 2023 16:34:02 +0000 (22:04 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 8 Dec 2023 07:52:22 +0000 (08:52 +0100)
[ Upstream commit 51597219e0cd5157401d4d0ccb5daa4d9961676f ]

When more than 64 VFs are enabled for a PF then mbox communication
between VF and PF is not working as mbox work queueing for few VFs
are skipped due to wrong calculation of VF numbers.

Fixes: d424b6c02415 ("octeontx2-pf: Enable SRIOV and added VF mbox handling")
Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Link: https://lore.kernel.org/r/1700930042-5400-1-git-send-email-sbhatta@marvell.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c

index ba95ac9..6d56fc1 100644 (file)
@@ -566,7 +566,9 @@ static irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq)
                otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), intr);
                otx2_queue_work(mbox, pf->mbox_pfvf_wq, 64, vfs, intr,
                                TYPE_PFVF);
-               vfs -= 64;
+               if (intr)
+                       trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);
+               vfs = 64;
        }
 
        intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(0));
@@ -574,7 +576,8 @@ static irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq)
 
        otx2_queue_work(mbox, pf->mbox_pfvf_wq, 0, vfs, intr, TYPE_PFVF);
 
-       trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);
+       if (intr)
+               trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);
 
        return IRQ_HANDLED;
 }