staging: rtl8192e: Join constants Rtl819XAGCTAB_.. with ..PciEAGCTAB..

Join constants Rtl819XAGCTAB_Array with Rtl8192PciEAGCTAB_Array to
RTL8192E_AGCTAB_ARR to improve readability.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/c7ca930adb5f72daa61b15b02001d09c4a1f8f46.1678814935.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
index 5b9a1b7..72ecdb9 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
@@ -313,7 +313,7 @@ static void _rtl92e_phy_config_bb(struct net_device *dev, u8 ConfigType)
        struct r8192_priv *priv = rtllib_priv(dev);
 
        AGCTAB_ArrayLen = RTL8192E_AGCTAB_ARR_LEN;
-       Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_Array;
+       Rtl819XAGCTAB_Array_Table = RTL8192E_AGCTAB_ARR;
        if (priv->rf_type == RF_1T2R) {
                PHY_REGArrayLen = RTL8192E_PHY_REG_1T2R_ARR_LEN;
                Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray;

diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
index ee91d68..1f9bafd 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
@@ -9,7 +9,6 @@
 
 #define MAX_DOZE_WAITING_TIMES_9x 64
 
-#define Rtl819XAGCTAB_Array                    Rtl8192PciEAGCTAB_Array
 #define Rtl819XPHY_REG_1T2RArray               Rtl8192PciEPHY_REG_1T2RArray
 
 extern u32 rtl819XAGCTAB_Array[];

diff --git a/drivers/staging/rtl8192e/rtl8192e/table.c b/drivers/staging/rtl8192e/rtl8192e/table.c
index eeea016..3a7656f 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/table.c
+++ b/drivers/staging/rtl8192e/rtl8192e/table.c
@@ -347,7 +347,7 @@ u32 RTL8192E_MACPHY_ARR_PG[] = {
        0x318, 0x00000fff, 0x00000800,
 };
 
-u32 Rtl8192PciEAGCTAB_Array[RTL8192E_AGCTAB_ARR_LEN] = {
+u32 RTL8192E_AGCTAB_ARR[RTL8192E_AGCTAB_ARR_LEN] = {
        0xc78, 0x7d000001,
        0xc78, 0x7d010001,
        0xc78, 0x7d020001,

diff --git a/drivers/staging/rtl8192e/rtl8192e/table.h b/drivers/staging/rtl8192e/rtl8192e/table.h
index 3023440..5762288 100644 (file)
--- a/drivers/staging/rtl8192e/rtl8192e/table.h
+++ b/drivers/staging/rtl8192e/rtl8192e/table.h
@@ -22,6 +22,6 @@ extern u32 RTL8192E_MACPHY_ARR[RTL8192E_MACPHY_ARR_LEN];
 #define RTL8192E_MACPHY_ARR_PG_LEN 30
 extern u32 RTL8192E_MACPHY_ARR_PG[RTL8192E_MACPHY_ARR_PG_LEN];
 #define RTL8192E_AGCTAB_ARR_LEN 384
-extern u32 Rtl8192PciEAGCTAB_Array[RTL8192E_AGCTAB_ARR_LEN];
+extern u32 RTL8192E_AGCTAB_ARR[RTL8192E_AGCTAB_ARR_LEN];
 
 #endif