clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id
authorNeil Armstrong <narmstrong@baylibre.com>
Mon, 4 Mar 2019 10:53:58 +0000 (11:53 +0100)
committerNeil Armstrong <narmstrong@baylibre.com>
Tue, 19 Mar 2019 20:10:21 +0000 (21:10 +0100)
When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved
to the internal non-exported bindings, but this clock is necessary and
mandatory for the SAR ADC bindings.

Export it back to the public bindings.

Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com
drivers/clk/meson/g12a-aoclk.h
include/dt-bindings/clock/g12a-aoclkc.h

index 04b0d55..666b449 100644 (file)
@@ -16,7 +16,6 @@
  * to expose, such as the internal muxes and dividers of composite clocks,
  * will remain defined here.
  */
-#define CLKID_AO_SAR_ADC_SEL   16
 #define CLKID_AO_SAR_ADC_DIV   17
 #define CLKID_AO_CTS_OSCIN     19
 #define CLKID_AO_32K_PRE       20
index 8db01ff..5ac66a2 100644 (file)
@@ -26,6 +26,7 @@
 #define CLKID_AO_M4_FCLK       13
 #define CLKID_AO_M4_HCLK       14
 #define CLKID_AO_CLK81         15
+#define CLKID_AO_SAR_ADC_SEL   16
 #define CLKID_AO_SAR_ADC_CLK   18
 #define CLKID_AO_32K           23
 #define CLKID_AO_CEC           27