RISC-V: preserve a1 in mcount
authorJamie Iles <jamie@jamieiles.com>
Tue, 15 Nov 2022 20:08:31 +0000 (20:08 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Fri, 2 Dec 2022 18:04:37 +0000 (10:04 -0800)
The RISC-V ELF psABI states that both a0 and a1 are used for return
values so we should preserve them both in return_to_handler.  This is
especially important for RV32 for functions returning a 64-bit quantity
otherwise the return value can be corrupted and undefined behaviour
results.

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Link: https://lore.kernel.org/r/20221115200832.706370-4-jamie@jamieiles.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/mcount.S

index 613bd07..30102aa 100644 (file)
@@ -29,6 +29,7 @@
        REG_S   s0, 2*SZREG(sp)
        REG_S   ra, 3*SZREG(sp)
        REG_S   a0, 1*SZREG(sp)
+       REG_S   a1, 0*SZREG(sp)
        addi    s0, sp, 4*SZREG
        .endm
 
@@ -42,6 +43,7 @@
        REG_L   ra, 3*SZREG(sp)
        REG_L   s0, 2*SZREG(sp)
        REG_L   a0, 1*SZREG(sp)
+       REG_L   a1, 0*SZREG(sp)
        addi    sp, sp, 4*SZREG
        .endm
 
@@ -71,9 +73,9 @@ ENTRY(return_to_handler)
        mv      a0, t6
 #endif
        call    ftrace_return_to_handler
-       mv      a1, a0
+       mv      a2, a0
        RESTORE_RET_ABI_STATE
-       jalr    a1
+       jalr    a2
 ENDPROC(return_to_handler)
 #endif