ARM: dts: stm32: add SPI support on stm32mp157c

This patch adds all SPI instances on stm32mp157c.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index a4d4b62..5183830 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -311,6 +311,34 @@
                        };
                };
 
+               spi2: spi@4000b000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32h7-spi";
+                       reg = <0x4000b000 0x400>;
+                       interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc SPI2_K>;
+                       resets = <&rcc SPI2_R>;
+                       dmas = <&dmamux1 39 0x400 0x05>,
+                              <&dmamux1 40 0x400 0x05>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
+               spi3: spi@4000c000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32h7-spi";
+                       reg = <0x4000c000 0x400>;
+                       interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc SPI3_K>;
+                       resets = <&rcc SPI3_R>;
+                       dmas = <&dmamux1 61 0x400 0x05>,
+                              <&dmamux1 62 0x400 0x05>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                usart2: serial@4000e000 {
                        compatible = "st,stm32h7-uart";
                        reg = <0x4000e000 0x400>;
@@ -494,6 +522,34 @@
                        status = "disabled";
                };
 
+               spi1: spi@44004000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32h7-spi";
+                       reg = <0x44004000 0x400>;
+                       interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc SPI1_K>;
+                       resets = <&rcc SPI1_R>;
+                       dmas = <&dmamux1 37 0x400 0x05>,
+                              <&dmamux1 38 0x400 0x05>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
+               spi4: spi@44005000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32h7-spi";
+                       reg = <0x44005000 0x400>;
+                       interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc SPI4_K>;
+                       resets = <&rcc SPI4_R>;
+                       dmas = <&dmamux1 83 0x400 0x05>,
+                              <&dmamux1 84 0x400 0x05>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                timers15: timer@44006000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -556,6 +612,20 @@
                        };
                };
 
+               spi5: spi@44009000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32h7-spi";
+                       reg = <0x44009000 0x400>;
+                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc SPI5_K>;
+                       resets = <&rcc SPI5_R>;
+                       dmas = <&dmamux1 85 0x400 0x05>,
+                              <&dmamux1 86 0x400 0x05>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                dfsdm: dfsdm@4400d000 {
                        compatible = "st,stm32mp1-dfsdm";
                        reg = <0x4400d000 0x800>;
@@ -971,6 +1041,20 @@
                        status = "disabled";
                };
 
+               spi6: spi@5c001000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32h7-spi";
+                       reg = <0x5c001000 0x400>;
+                       interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc SPI6_K>;
+                       resets = <&rcc SPI6_R>;
+                       dmas = <&mdma1 34 0x0 0x40008 0x0 0x0 0>,
+                              <&mdma1 35 0x0 0x40002 0x0 0x0 0>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
                i2c4: i2c@5c002000 {
                        compatible = "st,stm32f7-i2c";
                        reg = <0x5c002000 0x400>;