drm/i915/mtl: Fix rawclk for Meteorlake PCH

MTL has a fixed rawclk of 38400Khz. Register does not need to be
reprogrammed.

Bspec: 49304

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220818234202.451742-13-radhakrishna.sripada@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 86a22c3766e52206130bb5c817bf622d58adb313..1ee61abd40bc01e44bb1159d0a6fa26d6688ef08 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3036,6 +3036,13 @@ u32 intel_read_rawclk(struct drm_i915_private *dev_priv)
 
        if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1)
                freq = dg1_rawclk(dev_priv);
+       else if (INTEL_PCH_TYPE(dev_priv) >= PCH_MTP)
+               /*
+                * MTL always uses a 38.4 MHz rawclk.  The bspec tells us
+                * "RAWCLK_FREQ defaults to the values for 38.4 and does
+                * not need to be programmed."
+                */
+               freq = 38400;
        else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP)
                freq = cnp_rawclk(dev_priv);
        else if (HAS_PCH_SPLIT(dev_priv))