arm64: dts: rockchip: configure eth pad driver strength for orangepi r1 plus lts
authorTianling Shen <cnsztl@gmail.com>
Sat, 16 Dec 2023 04:07:23 +0000 (12:07 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 1 Feb 2024 00:18:53 +0000 (16:18 -0800)
commit fc5a80a432607d05e85bba37971712405f75c546 upstream.

The default strength is not enough to provide stable connection
under 3.3v LDO voltage.

Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS")
Cc: stable@vger.kernel.org # 6.6+
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20231216040723.17864-1-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts

index 5d7d567..4237f2e 100644 (file)
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
 
+                       motorcomm,auto-sleep-disabled;
                        motorcomm,clk-out-frequency-hz = <125000000>;
                        motorcomm,keep-pll-enabled;
-                       motorcomm,auto-sleep-disabled;
+                       motorcomm,rx-clk-drv-microamp = <5020>;
+                       motorcomm,rx-data-drv-microamp = <5020>;
 
                        pinctrl-0 = <&eth_phy_reset_pin>;
                        pinctrl-names = "default";