ARM: dts: qcom: sdx65: Add support for SDHCI controller

Add devicetree support for SDHCI controller found in Qualcomm SDX65
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649670615-21268-4-git-send-email-quic_rohiagar@quicinc.com

diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index dcc94c2..77bca58 100644 (file)
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -137,6 +137,19 @@
                        status = "disabled";
                };
 
+               sdhc_1: sdhci@8804000 {
+                       compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
+                       reg = <0x08804000 0x1000>;
+                       reg-names = "hc_mem";
+                       interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "hc_irq", "pwr_irq";
+                       clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+                                <&gcc GCC_SDCC1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       status = "disabled";
+               };
+
                spmi_bus: qcom,spmi@c440000 {
                        compatible = "qcom,spmi-pmic-arb";
                        reg = <0xc440000 0xd00>,