const LLT P2 = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64);
setAction({G_ADD, S32}, Legal);
+ setAction({G_MUL, S32}, Legal);
setAction({G_AND, S32}, Legal);
setAction({G_OR, S32}, Legal);
setAction({G_XOR, S32}, Legal);
--- /dev/null
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+---
+name: test_mul
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; CHECK-LABEL: name: test_mul
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
+ ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
+ ; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]]
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s32) = G_MUL %0, %1
+ $vgpr0 = COPY %2
+...