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[MIPS] SMTC: Fix secondary VPE interrupt mask initialization.
author
Ralf Baechle
<ralf@linux-mips.org>
Wed, 1 Aug 2007 18:42:37 +0000
(19:42 +0100)
committer
Ralf Baechle
<ralf@linux-mips.org>
Mon, 27 Aug 2007 01:16:49 +0000
(
02:16
+0100)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mips-boards/malta/malta_smtc.c
patch
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diff --git
a/arch/mips/mips-boards/malta/malta_smtc.c
b/arch/mips/mips-boards/malta/malta_smtc.c
index
0fb4c26
..
ea8f3bb
100644
(file)
--- a/
arch/mips/mips-boards/malta/malta_smtc.c
+++ b/
arch/mips/mips-boards/malta/malta_smtc.c
@@
-42,10
+42,11
@@
void prom_init_secondary(void)
myvpe = read_c0_tcbind() & TCBIND_CURVPE;
if (myvpe != 0) {
/* Ideally, this should be done only once per VPE, but... */
- clear_c0_status(STATUSF_IP2);
- set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3
- | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6
- | STATUSF_IP7);
+ clear_c0_status(ST0_IM);
+ set_c0_status((0x100 << cp0_compare_irq)
+ | (0x100 << MIPS_CPU_IPI_IRQ));
+ if (cp0_perfcount_irq >= 0)
+ set_c0_status(0x100 << cp0_perfcount_irq);
}
smtc_init_secondary();