radeonsi: Fix VGPR_BIT() definition.

Fixes encoding of VOP3 shader instructions.

The shift was wrong for source registers 2 and 3, and the resulting value was
only 32 bits, so the shift in SICodeEmitter::VOPPostEncode() didn't work as
intended.

diff --git a/src/gallium/drivers/radeon/SICodeEmitter.cpp b/src/gallium/drivers/radeon/SICodeEmitter.cpp
index 0553f0e..ad494fa 100644 (file)
--- a/src/gallium/drivers/radeon/SICodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/SICodeEmitter.cpp
@@ -25,7 +25,7 @@
 #include <stdio.h>
 
 #define LITERAL_REG 255
-#define VGPR_BIT(src_idx) (1 << (8 * (src_idx)))
+#define VGPR_BIT(src_idx) (1ULL << (9 * src_idx - 1))
 using namespace llvm;
 
 namespace {