clk: renesas: r8a7796: Add DU and LVDS clocks

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index b537ec8..c880d72 100644 (file)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -155,6 +155,10 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("vspd0",                 623,   R8A7796_CLK_S0D2),
        DEF_MOD("vspb",                  626,   R8A7796_CLK_S0D1),
        DEF_MOD("vspi0",                 631,   R8A7796_CLK_S0D1),
+       DEF_MOD("du2",                   722,   R8A7796_CLK_S2D1),
+       DEF_MOD("du1",                   723,   R8A7796_CLK_S2D1),
+       DEF_MOD("du0",                   724,   R8A7796_CLK_S2D1),
+       DEF_MOD("lvds",                  727,   R8A7796_CLK_S2D1),
        DEF_MOD("etheravb",              812,   R8A7796_CLK_S0D6),
        DEF_MOD("gpio7",                 905,   R8A7796_CLK_S3D4),
        DEF_MOD("gpio6",                 906,   R8A7796_CLK_S3D4),