octeontx2-af: Add new mbox messages to retrieve MCAM entries

This patch introduces new mailbox mesages to retrieve a given
MCAM entry or base flow steering rule of a VF installed by its
parent PF. This helps while updating the existing MCAM rules
with out re-framing the whole mailbox request again. The INSTALL
FLOW mailbox consumer can read-modify-write the existing entry.
Similarly while installing new flow rules for a VF, the base
flow steering rule match creteria is copied to the new flow rule
and the deltas are appended to the new rule.

Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
Co-developed-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index ef20078..8ea132e 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -192,6 +192,11 @@ M(NPC_INSTALL_FLOW,          0x600d, npc_install_flow,                            \
                                  npc_install_flow_req, npc_install_flow_rsp)  \
 M(NPC_DELETE_FLOW,       0x600e, npc_delete_flow,                      \
                                  npc_delete_flow_req, msg_rsp)         \
+M(NPC_MCAM_READ_ENTRY,   0x600f, npc_mcam_read_entry,                  \
+                                 npc_mcam_read_entry_req,              \
+                                 npc_mcam_read_entry_rsp)              \
+M(NPC_MCAM_READ_BASE_RULE, 0x6011, npc_read_base_steer_rule,            \
+                                  msg_req, npc_mcam_read_base_rule_rsp)  \
 /* NIX mbox IDs (range 0x8000 - 0xFFFF) */                             \
 M(NIX_LF_ALLOC,                0x8000, nix_lf_alloc,                           \
                                 nix_lf_alloc_req, nix_lf_alloc_rsp)    \
@@ -1009,6 +1014,23 @@ struct npc_delete_flow_req {
        u8 all; /* PF + VFs */
 };
 
+struct npc_mcam_read_entry_req {
+       struct mbox_msghdr hdr;
+       u16 entry;       /* MCAM entry to read */
+};
+
+struct npc_mcam_read_entry_rsp {
+       struct mbox_msghdr hdr;
+       struct mcam_entry entry_data;
+       u8 intf;
+       u8 enable;
+};
+
+struct npc_mcam_read_base_rule_rsp {
+       struct mbox_msghdr hdr;
+       struct mcam_entry entry;
+};
+
 enum ptp_op {
        PTP_OP_ADJFINE = 0,
        PTP_OP_GET_CLOCK = 1,

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
index 2eb4169..dd54d41 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
@@ -2193,6 +2193,30 @@ exit:
        return rc;
 }
 
+int rvu_mbox_handler_npc_mcam_read_entry(struct rvu *rvu,
+                                        struct npc_mcam_read_entry_req *req,
+                                        struct npc_mcam_read_entry_rsp *rsp)
+{
+       struct npc_mcam *mcam = &rvu->hw->mcam;
+       u16 pcifunc = req->hdr.pcifunc;
+       int blkaddr, rc;
+
+       blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
+       if (blkaddr < 0)
+               return NPC_MCAM_INVALID_REQ;
+
+       mutex_lock(&mcam->lock);
+       rc = npc_mcam_verify_entry(mcam, pcifunc, req->entry);
+       if (!rc) {
+               npc_read_mcam_entry(rvu, mcam, blkaddr, req->entry,
+                                   &rsp->entry_data,
+                                   &rsp->intf, &rsp->enable);
+       }
+
+       mutex_unlock(&mcam->lock);
+       return rc;
+}
+
 int rvu_mbox_handler_npc_mcam_write_entry(struct rvu *rvu,
                                          struct npc_mcam_write_entry_req *req,
                                          struct msg_rsp *rsp)
@@ -2753,3 +2777,49 @@ bool rvu_npc_write_default_rule(struct rvu *rvu, int blkaddr, int nixlf,
 
        return enable;
 }
+
+int rvu_mbox_handler_npc_read_base_steer_rule(struct rvu *rvu,
+                                             struct msg_req *req,
+                                             struct npc_mcam_read_base_rule_rsp *rsp)
+{
+       struct npc_mcam *mcam = &rvu->hw->mcam;
+       int index, blkaddr, nixlf, rc = 0;
+       u16 pcifunc = req->hdr.pcifunc;
+       struct rvu_pfvf *pfvf;
+       u8 intf, enable;
+
+       blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, 0);
+       if (blkaddr < 0)
+               return NPC_MCAM_INVALID_REQ;
+
+       /* Return the channel number in case of PF */
+       if (!(pcifunc & RVU_PFVF_FUNC_MASK)) {
+               pfvf = rvu_get_pfvf(rvu, pcifunc);
+               rsp->entry.kw[0] = pfvf->rx_chan_base;
+               rsp->entry.kw_mask[0] = 0xFFFULL;
+               goto out;
+       }
+
+       /* Find the pkt steering rule installed by PF to this VF */
+       mutex_lock(&mcam->lock);
+       for (index = 0; index < mcam->bmap_entries; index++) {
+               if (mcam->entry2target_pffunc[index] == pcifunc)
+                       goto read_entry;
+       }
+
+       rc = nix_get_nixlf(rvu, pcifunc, &nixlf, NULL);
+       if (rc < 0) {
+               mutex_unlock(&mcam->lock);
+               goto out;
+       }
+       /* Read the default ucast entry if there is no pkt steering rule */
+       index = npc_get_nixlf_mcam_index(mcam, pcifunc, nixlf,
+                                        NIXLF_UCAST_ENTRY);
+read_entry:
+       /* Read the mcam entry */
+       npc_read_mcam_entry(rvu, mcam, blkaddr, index, &rsp->entry, &intf,
+                           &enable);
+       mutex_unlock(&mcam->lock);
+out:
+       return rc;
+}