TCG_AREG0 = TCG_REG_R6,
};
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
+static inline void flush_icache_range(tcg_target_ulong start,
+ tcg_target_ulong stop)
{
#if QEMU_GNUC_PREREQ(4, 1)
__builtin___clear_cache((char *) start, (char *) stop);
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_R17
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
+
+static inline void flush_icache_range(tcg_target_ulong start,
+ tcg_target_ulong stop)
{
start &= ~31;
while (start <= stop) {
/* Guest base is supported */
#define TCG_TARGET_HAS_GUEST_BASE
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
+static inline void flush_icache_range(tcg_target_ulong start,
+ tcg_target_ulong stop)
{
start = start & ~(32UL - 1UL);
stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL);
#include <sys/cachectl.h>
#endif
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
+static inline void flush_icache_range(tcg_target_ulong start,
+ tcg_target_ulong stop)
{
cacheflush ((void *)start, stop-start, ICACHE);
}
TCG_AREG0 = TCG_REG_R10,
};
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
+static inline void flush_icache_range(tcg_target_ulong start,
+ tcg_target_ulong stop)
{
}
#define TCG_AREG0 TCG_REG_G6
#endif
-static inline void flush_icache_range(unsigned long start, unsigned long stop)
+static inline void flush_icache_range(tcg_target_ulong start,
+ tcg_target_ulong stop)
{
unsigned long p;