ARM: dts: exynos: Add sysreg phandle to ADC node
authorNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Tue, 16 Sep 2014 08:58:00 +0000 (09:58 +0100)
committerJonathan Cameron <jic23@kernel.org>
Wed, 5 Nov 2014 15:30:32 +0000 (15:30 +0000)
Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.

This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
To: linux-samsung-soc@vger.kernel.org
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
arch/arm/boot/dts/exynos3250.dtsi
arch/arm/boot/dts/exynos4x12.dtsi
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/boot/dts/exynos5420.dtsi

index 1d52de6..b997a4c 100644 (file)
                adc: adc@126C0000 {
                        compatible = "samsung,exynos3250-adc",
                                     "samsung,exynos-adc-v2";
-                       reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+                       reg = <0x126C0000 0x100>;
                        interrupts = <0 137 0>;
                        clock-names = "adc", "sclk";
                        clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
                        #io-channel-cells = <1>;
                        io-channel-ranges;
+                       samsung,syscon-phandle = <&pmu_system_controller>;
                        status = "disabled";
                };
 
index 861bb91..9ee77d3 100644 (file)
 
        adc: adc@126C0000 {
                compatible = "samsung,exynos-adc-v1";
-               reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+               reg = <0x126C0000 0x100>;
                interrupt-parent = <&combiner>;
                interrupts = <10 3>;
                clocks = <&clock CLK_TSADC>;
                clock-names = "adc";
                #io-channel-cells = <1>;
                io-channel-ranges;
+               samsung,syscon-phandle = <&pmu_system_controller>;
                status = "disabled";
        };
 
index 492e1ef..8d575f2 100644 (file)
 
        adc: adc@12D10000 {
                compatible = "samsung,exynos-adc-v1";
-               reg = <0x12D10000 0x100>, <0x10040718 0x4>;
+               reg = <0x12D10000 0x100>;
                interrupts = <0 106 0>;
                clocks = <&clock CLK_ADC>;
                clock-names = "adc";
                #io-channel-cells = <1>;
                io-channel-ranges;
+               samsung,syscon-phandle = <&pmu_system_controller>;
                status = "disabled";
        };
 
index bfe056d..5fd587a 100644 (file)
 
        adc: adc@12D10000 {
                compatible = "samsung,exynos-adc-v2";
-               reg = <0x12D10000 0x100>, <0x10040720 0x4>;
+               reg = <0x12D10000 0x100>;
                interrupts = <0 106 0>;
                clocks = <&clock CLK_TSADC>;
                clock-names = "adc";
                #io-channel-cells = <1>;
                io-channel-ranges;
+               samsung,syscon-phandle = <&pmu_system_controller>;
                status = "disabled";
        };