dt-bingings:jpu:jh7110: Add CLK signals to JPU.

Jpu uses the Clock framework API.

Signed-off-by: samin <samin.guo@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 490ebea..cdfdaef 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -543,15 +543,15 @@
                jpu: jpu@11900000 {
                        compatible = "starfive,jpu";
                        reg = <0x0 0x13090000 0x0 0x300>;
-                       clocks = <&jpuclk>;
+                       interrupts = <14>;
+                       clocks = <&clkgen JH7110_CODAJ12_CLK_AXI>,
+                               <&clkgen JH7110_CODAJ12_CLK_CORE>,
+                               <&clkgen JH7110_CODAJ12_CLK_APB>;
                        clock-names = "axi_clk", "core_clk", "apb_clk";
                        resets = <&rstgen RSTN_U0_CODAJ12_AXI>,
                                <&rstgen RSTN_U0_CODAJ12_CORE>,
                                <&rstgen RSTN_U0_CODAJ12_APB>;
-                       reset-names = "rst_axi",
-                               "rst_core",
-                               "rst_apb";
-                       interrupts = <14>;
+                       reset-names = "rst_axi", "rst_core", "rst_apb";
                        status = "disabled";
                };