drm/amd/pm: correct vddc_dep_on_dal_pwrl setup
authorEvan Quan <evan.quan@amd.com>
Fri, 25 Sep 2020 06:38:11 +0000 (14:38 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 27 Oct 2020 16:00:21 +0000 (12:00 -0400)
Correct Polaris10 setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu_helper.c

index b485f8b..2a0ca51 100644 (file)
@@ -505,11 +505,23 @@ int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr
        } else {
                table_clk_vlt->count = 4;
                table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_ULTRALOW;
-               table_clk_vlt->entries[0].v = 0;
+               if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+                   hwmgr->chip_id <= CHIP_VEGAM)
+                       table_clk_vlt->entries[0].v = 700;
+               else
+                       table_clk_vlt->entries[0].v = 0;
                table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_LOW;
-               table_clk_vlt->entries[1].v = 720;
+               if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+                   hwmgr->chip_id <= CHIP_VEGAM)
+                       table_clk_vlt->entries[1].v = 740;
+               else
+                       table_clk_vlt->entries[1].v = 720;
                table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_NOMINAL;
-               table_clk_vlt->entries[2].v = 810;
+               if (hwmgr->chip_id >= CHIP_POLARIS10 &&
+                   hwmgr->chip_id <= CHIP_VEGAM)
+                       table_clk_vlt->entries[2].v = 800;
+               else
+                       table_clk_vlt->entries[2].v = 810;
                table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_PERFORMANCE;
                table_clk_vlt->entries[3].v = 900;
                if (pptable_info != NULL)