reg = <0x0 0xffe09080 0x0 0x20>;
phy-reg = <0xff646000>;
phy-reg-size = <0x4>;
+ usb2-phy-reg = <0xffe09000>;
+ usb2-phy-reg-size = <0x80>;
interrupts = <0 16 4>;
- otg = <0>;
+ otg = <1>;
clocks = <&clkc CLKID_PCIE_PLL>;
clock-names = "pcie_refpll";
+ gpio-vbus-power = "GPIOH_6";
+ gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
};
dwc2_a {
usb-fifo = <728>;
cpu-type = "v2";
/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
- controller-type = <1>;
+ controller-type = <3>;
phy-reg = <0xffe09000>;
phy-reg-size = <0xa0>;
/** phy-interface: 0x0: amlogic phy, 0x1: synopsys phy **/
void aml_new_usb_v2_init(void)
{
union usb_r5_v2 r5 = {.d32 = 0};
- unsigned long reg_addr = ((unsigned long)
- usb_new_aml_regs_v2.usb_r_v2[0] - 0x80);
+ unsigned long reg_addr = (unsigned long)
+ g_phy_v2->usb2_phy_cfg;
r5.d32 = readl(usb_new_aml_regs_v2.usb_r_v2[5]);
if (r5.b.iddig_curr == 0) {
struct amlogic_usb_v2 *phy =
container_of(work, struct amlogic_usb_v2, work.work);
union usb_r5_v2 r5 = {.d32 = 0};
- unsigned long reg_addr = ((unsigned long)phy->regs - 0x80);
+ unsigned long reg_addr = ((unsigned long)phy->usb2_phy_cfg);
r5.d32 = readl(usb_new_aml_regs_v2.usb_r_v2[5]);
if (r5.b.iddig_curr == 0) {
void __iomem *phy3_base;
unsigned int phy3_mem;
unsigned int phy3_mem_size = 0;
+ void __iomem *usb2_phy_base;
+ unsigned int usb2_phy_mem;
+ unsigned int usb2_phy_mem_size = 0;
const char *gpio_name = NULL;
struct gpio_desc *usb_gd = NULL;
const void *prop;
if (!phy3_base)
return -ENOMEM;
+ retval = of_property_read_u32
+ (dev->of_node, "usb2-phy-reg", &usb2_phy_mem);
+ if (retval < 0)
+ return -EINVAL;
+
+ retval = of_property_read_u32
+ (dev->of_node, "usb2-phy-reg-size", &usb2_phy_mem_size);
+ if (retval < 0)
+ return -EINVAL;
+
+ usb2_phy_base = devm_ioremap_nocache
+ (&(pdev->dev), (resource_size_t)usb2_phy_mem,
+ (unsigned long)usb2_phy_mem_size);
+ if (!usb2_phy_base)
+ return -ENOMEM;
+
phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
if (!phy)
return -ENOMEM;
phy->dev = dev;
phy->regs = phy_base;
phy->phy3_cfg = phy3_base;
+ phy->usb2_phy_cfg = usb2_phy_base;
phy->portnum = portnum;
phy->suspend_flag = 0;
phy->phy.dev = phy->dev;