#include "mlir/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Export.h"
#include "llvm/Support/TargetSelect.h"
+#include "llvm/Support/Threading.h"
#include <cuda.h>
namespace {
class SerializeToCubinPass
: public PassWrapper<SerializeToCubinPass, gpu::SerializeToBlobPass> {
+ static llvm::once_flag initializeBackendOnce;
+
public:
MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(SerializeToCubinPass)
option = value.str();
}
+llvm::once_flag SerializeToCubinPass::initializeBackendOnce;
+
SerializeToCubinPass::SerializeToCubinPass(StringRef triple, StringRef chip,
StringRef features, int optLevel,
bool dumpPtx) {
+ // No matter how this pass is constructed, ensure that the NVPTX backend
+ // is initialized exactly once.
+ llvm::call_once(initializeBackendOnce, []() {
+ // Initialize LLVM NVPTX backend.
+ LLVMInitializeNVPTXTarget();
+ LLVMInitializeNVPTXTargetInfo();
+ LLVMInitializeNVPTXTargetMC();
+ LLVMInitializeNVPTXAsmPrinter();
+ });
+
maybeSetOption(this->triple, triple);
maybeSetOption(this->chip, chip);
maybeSetOption(this->features, features);
// Register pass to serialize GPU kernel functions to a CUBIN binary annotation.
void mlir::registerGpuSerializeToCubinPass() {
- PassRegistration<SerializeToCubinPass> registerSerializeToCubin([] {
- // Initialize LLVM NVPTX backend.
- LLVMInitializeNVPTXTarget();
- LLVMInitializeNVPTXTargetInfo();
- LLVMInitializeNVPTXTargetMC();
- LLVMInitializeNVPTXAsmPrinter();
-
- return std::make_unique<SerializeToCubinPass>();
- });
+ PassRegistration<SerializeToCubinPass> registerSerializeToCubin(
+ [] { return std::make_unique<SerializeToCubinPass>(); });
}
std::unique_ptr<Pass> mlir::createGpuSerializeToCubinPass(StringRef triple,
#include "llvm/Support/Program.h"
#include "llvm/Support/SourceMgr.h"
#include "llvm/Support/TargetSelect.h"
+#include "llvm/Support/Threading.h"
#include "llvm/Support/WithColor.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Transforms/IPO/Internalize.h"
-#include <mutex>
#include <optional>
using namespace mlir;
namespace {
class SerializeToHsacoPass
: public PassWrapper<SerializeToHsacoPass, gpu::SerializeToBlobPass> {
+ static llvm::once_flag initializeBackendOnce;
+
public:
MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(SerializeToHsacoPass)
option = getValue();
}
+llvm::once_flag SerializeToHsacoPass::initializeBackendOnce;
+
SerializeToHsacoPass::SerializeToHsacoPass(StringRef triple, StringRef arch,
StringRef features, int optLevel) {
+ // No matter how this pass is constructed, ensure that the AMDGPU backend
+ // is initialized exactly once.
+ llvm::call_once(initializeBackendOnce, []() {
+ // Initialize LLVM AMDGPU backend.
+ LLVMInitializeAMDGPUAsmParser();
+ LLVMInitializeAMDGPUAsmPrinter();
+ LLVMInitializeAMDGPUTarget();
+ LLVMInitializeAMDGPUTargetInfo();
+ LLVMInitializeAMDGPUTargetMC();
+ });
maybeSetOption(this->triple, [&triple] { return triple.str(); });
maybeSetOption(this->chip, [&arch] { return arch.str(); });
maybeSetOption(this->features, [&features] { return features.str(); });
// Register pass to serialize GPU kernel functions to a HSACO binary annotation.
void mlir::registerGpuSerializeToHsacoPass() {
PassRegistration<SerializeToHsacoPass> registerSerializeToHSACO([] {
- // Initialize LLVM AMDGPU backend.
- LLVMInitializeAMDGPUAsmParser();
- LLVMInitializeAMDGPUAsmPrinter();
- LLVMInitializeAMDGPUTarget();
- LLVMInitializeAMDGPUTargetInfo();
- LLVMInitializeAMDGPUTargetMC();
-
return std::make_unique<SerializeToHsacoPass>("amdgcn-amd-amdhsa", "", "",
2);
});