platform/x86/amd: pmc: Add an extra STB message for checking s2idle entry
authorMario Limonciello <mario.limonciello@amd.com>
Mon, 29 Aug 2022 16:29:52 +0000 (11:29 -0500)
committerHans de Goede <hdegoede@redhat.com>
Fri, 9 Sep 2022 15:37:41 +0000 (17:37 +0200)
The `check` callback is run right before the cores are put into HLT.
This will allow checking synchronization problems with other software
that writes into the STB.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20220829162953.5947-5-mario.limonciello@amd.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
drivers/platform/x86/amd/pmc.c

index fba4203..3288768 100644 (file)
@@ -41,6 +41,7 @@
 #define AMD_PMC_STB_PMI_0              0x03E30600
 #define AMD_PMC_STB_S2IDLE_PREPARE     0xC6000001
 #define AMD_PMC_STB_S2IDLE_RESTORE     0xC6000002
+#define AMD_PMC_STB_S2IDLE_CHECK       0xC6000003
 
 /* STB S2D(Spill to DRAM) has different message port offset */
 #define STB_SPILL_TO_DRAM              0xBE
@@ -706,6 +707,16 @@ static void amd_pmc_s2idle_prepare(void)
                dev_err(pdev->dev, "error writing to STB: %d\n", rc);
 }
 
+static void amd_pmc_s2idle_check(void)
+{
+       struct amd_pmc_dev *pdev = &pmc;
+       int rc;
+
+       rc = amd_pmc_write_stb(pdev, AMD_PMC_STB_S2IDLE_CHECK);
+       if (rc)
+               dev_err(pdev->dev, "error writing to STB: %d\n", rc);
+}
+
 static void amd_pmc_s2idle_restore(void)
 {
        struct amd_pmc_dev *pdev = &pmc;
@@ -733,6 +744,7 @@ static void amd_pmc_s2idle_restore(void)
 
 static struct acpi_s2idle_dev_ops amd_pmc_s2idle_dev_ops = {
        .prepare = amd_pmc_s2idle_prepare,
+       .check = amd_pmc_s2idle_check,
        .restore = amd_pmc_s2idle_restore,
 };
 #endif