; PR9998
; Make sure we don't transform the ashr here into an sdiv
-define i1 @pr9998(i32 %V) nounwind {
+define i1 @pr9998(i32 %V) {
; CHECK-LABEL: @pr9998(
; CHECK-NEXT: [[W_MASK:%.*]] = and i32 %V, 1
; CHECK-NEXT: [[Z:%.*]] = icmp ne i32 [[W_MASK]], 0
ret i1 %Z
}
+; FIXME: Vectors should fold the same way.
+define <2 x i1> @pr9998vec(<2 x i32> %V) {
+; CHECK-LABEL: @pr9998vec(
+; CHECK-NEXT: [[W:%.*]] = shl <2 x i32> %V, <i32 31, i32 31>
+; CHECK-NEXT: [[X:%.*]] = ashr exact <2 x i32> [[W]], <i32 31, i32 31>
+; CHECK-NEXT: [[Y:%.*]] = sext <2 x i32> [[X]] to <2 x i64>
+; CHECK-NEXT: [[Z:%.*]] = icmp ugt <2 x i64> [[Y]], <i64 7297771788697658747, i64 7297771788697658747>
+; CHECK-NEXT: ret <2 x i1> [[Z]]
+;
+ %W = shl <2 x i32> %V, <i32 31, i32 31>
+ %X = ashr exact <2 x i32> %W, <i32 31, i32 31>
+ %Y = sext <2 x i32> %X to <2 x i64>
+ %Z = icmp ugt <2 x i64> %Y, <i64 7297771788697658747, i64 7297771788697658747>
+ ret <2 x i1> %Z
+}
+
define i1 @udiv_icmp1(i64 %X) {
; CHECK-LABEL: @udiv_icmp1(
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 %X, 0
ret i1 %tmp2
}
+; FIXME: Vectors should fold the same way.
+define <2 x i1> @test35vec(<2 x i32> %X) {
+; CHECK-LABEL: @test35vec(
+; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> %X, <i32 7, i32 7>
+; CHECK-NEXT: [[TMP2:%.*]] = icmp slt <2 x i32> [[TMP1]], zeroinitializer
+; CHECK-NEXT: ret <2 x i1> [[TMP2]]
+;
+ %tmp1 = ashr <2 x i32> %X, <i32 7, i32 7>
+ %tmp2 = icmp slt <2 x i32> %tmp1, zeroinitializer
+ ret <2 x i1> %tmp2
+}
+
define i128 @test36(i128 %A, i128 %B) {
; CHECK-LABEL: @test36(
; CHECK-NEXT: entry: