gas: blackfin: reject multiple store insns in parallel insns

Check for & reject attempts to use multiple store insns in a single
parallel insn combination.  These are illegal per the Blackfin ISA.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 102f307..b936db5 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
 2010-09-22  Robin Getz  <robin.getz@analog.com>
 
+       * config/bfin-parse.y (is_store): New function.
+       (gen_multi_instr_1): Check parallel slots for store insns.
+
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
        * config/bfin-defs.h (IS_EMUDAT): New define.
        * config/bfin-parse.y: Accept EMUDAT for any register move.
 

diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index 0dd729c..90d3b04 100644 (file)
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -380,6 +380,36 @@ is_group2 (INSTR_T x)
   return 0;
 }
 
+static int
+is_store (INSTR_T x)
+{
+  if (!x)
+    return 0;
+
+  if ((x->value & 0xf000) == 0x8000)
+    {
+      int aop = ((x->value >> 9) & 0x3);
+      int w = ((x->value >> 11) & 0x1);
+      if (!w || aop == 3)
+       return 0;
+      return 1;
+    }
+
+  if (((x->value & 0xFF60) == 0x9E60) ||  /* dagMODim_0 */
+      ((x->value & 0xFFF0) == 0x9F60))    /* dagMODik_0 */
+    return 0;
+
+  /* decode_dspLDST_0 */
+  if ((x->value & 0xFC00) == 0x9C00)
+    {
+      int w = ((x->value >> 9) & 0x1);
+      if (w)
+       return 1;
+    }
+
+  return 0;
+}
+
 static INSTR_T
 gen_multi_instr_1 (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2)
 {
@@ -400,6 +430,9 @@ gen_multi_instr_1 (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2)
     yyerror ("anomaly 05000074 - Multi-Issue Instruction with \
 dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported");
 
+  if (is_store (dsp16_grp1) && is_store (dsp16_grp2))
+    yyerror ("Only one instruction in multi-issue instruction can be a store");
+
   return bfin_gen_multi_instr (dsp32, dsp16_grp1, dsp16_grp2);
 }