arm64: dts: imx8ulp: add cpuidle node

Add cpuidle node and enable cpuidle for dual cores. The HW mode in
Arm Trusted Firmware is SoC Application Power Domain Sleep mode.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 8891b4d..17cbe52 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -40,6 +40,7 @@
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                        next-level-cache = <&A35_L2>;
+                       cpu-idle-states = <&cpu_sleep>;
                };
 
                A35_1: cpu@1 {
@@ -48,6 +49,7 @@
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                        next-level-cache = <&A35_L2>;
+                       cpu-idle-states = <&cpu_sleep>;
                };
 
                A35_L2: l2-cache0 {
@@ -55,6 +57,19 @@
                        cache-level = <2>;
                        cache-unified;
                };
+
+               idle-states {
+                       entry-method = "psci";
+
+                       cpu_sleep: cpu-sleep {
+                               compatible = "arm,idle-state";
+                               arm,psci-suspend-param = <0x0>;
+                               local-timer-stop;
+                               entry-latency-us = <1000>;
+                               exit-latency-us = <700>;
+                               min-residency-us = <2700>;
+                       };
+               };
        };
 
        gic: interrupt-controller@2d400000 {