ARM: dts: Add cpufreq dt node for Exynos3250

This patch add cpufreq dt node for Exynos3250 and remove un-used cpufreq
information.

Change-Id: Ia70bf3c83b032a3e58537aa5850a284bc4a91197
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 76e1f21..8c176a8 100644 (file)
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -53,21 +53,6 @@
                        compatible = "arm,cortex-a7";
                        reg = <0>;
                        clock-frequency = <1000000000>;
-                       clocks = <&cmu CLK_DIV_CORE2>;
-                       clock-names = "cpu";
-
-                       operating-points = <
-                               1000000 1150000
-                               900000  1112500
-                               800000  1075000
-                               700000  1037500
-                               600000  1000000
-                               500000  962500
-                               400000  925000
-                               300000  887500
-                               200000  850000
-                               100000  850000
-                       >;
                };
 
                cpu1: cpu@1 {
@@ -694,6 +679,17 @@
                        status = "disabled";
                };
 
+               cpufreq: cpufreq {
+                       compatible = "samsung,exynos-cpufreq";
+                       clocks = <&cmu CLK_DIV_CORE2>,
+                                <&cmu CLK_MOUT_CORE>,
+                                <&cmu CLK_MOUT_MPLL_USER_C>,
+                                <&cmu CLK_MOUT_APLL>;
+                       clock-names = "div_core2", "mout_core",
+                                     "mout_mpll_user_c", "mout_apll";
+                       status = "disabled";
+               };
+
                pmu {
                        compatible = "arm,cortex-a7-pmu";
                        interrupts = <0 18 0>, <0 19 0>;