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ARM: dts: stm32mp1: move FDCAN to PLL4_R
authorAntonio Borneo <antonio.borneo@st.com>
Tue, 28 Jan 2020 09:11:01 +0000 (10:11 +0100)
committerPatrick Delaunay <patrick.delaunay@st.com>
Thu, 13 Feb 2020 16:26:22 +0000 (17:26 +0100)
LTDC modifies the clock frequency to adapt it to the display. Such
frequency change is not detected by the FDCAN driver that instead
cache the value at probe and pretend to use it later.

Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R.

Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi patch | blob | history
arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi patch | blob | history
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi patch | blob | history
arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi patch | blob | history

diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
index 1104a70..d8a4617 100644 (file)
--- a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
@@ -91,7 +91,7 @@
                CLK_UART6_HSI
                CLK_UART78_HSI
                CLK_SPDIF_PLL4P
-               CLK_FDCAN_PLL4Q
+               CLK_FDCAN_PLL4R
                CLK_SAI1_PLL3Q
                CLK_SAI2_PLL3Q
                CLK_SAI3_PLL3Q
diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index 4045a6e..a7a125c 100644 (file)
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -110,7 +110,7 @@
                CLK_UART6_HSI
                CLK_UART78_HSI
                CLK_SPDIF_PLL4P
-               CLK_FDCAN_PLL4Q
+               CLK_FDCAN_PLL4R
                CLK_SAI1_PLL3Q
                CLK_SAI2_PLL3Q
                CLK_SAI3_PLL3Q
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index b2ac494..32d95b8 100644 (file)
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -107,7 +107,7 @@
                CLK_UART6_HSI
                CLK_UART78_HSI
                CLK_SPDIF_PLL4P
-               CLK_FDCAN_PLL4Q
+               CLK_FDCAN_PLL4R
                CLK_SAI1_PLL3Q
                CLK_SAI2_PLL3Q
                CLK_SAI3_PLL3Q
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index 320912e..21aa4bf 100644 (file)
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -142,7 +142,7 @@
                CLK_UART6_HSI
                CLK_UART78_HSI
                CLK_SPDIF_PLL4P
-               CLK_FDCAN_PLL4Q
+               CLK_FDCAN_PLL4R
                CLK_SAI1_PLL3Q
                CLK_SAI2_PLL3Q
                CLK_SAI3_PLL3Q
Domain: System / Kernel;