s5pc110: clock: Fix clock calculation

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

diff --git a/cpu/arm_cortexa8/s5pc1xx/clock.c b/cpu/arm_cortexa8/s5pc1xx/clock.c
index 03984aa..6eae7e9 100644 (file)
--- a/cpu/arm_cortexa8/s5pc1xx/clock.c
+++ b/cpu/arm_cortexa8/s5pc1xx/clock.c
@@ -40,6 +40,13 @@
 #define HPLL 3
 #define VPLL 4
 
+#ifndef CONFIG_SYS_CLK_FREQ_C100
+#define CONFIG_SYS_CLK_FREQ_C100       12000000
+#endif
+#ifndef CONFIG_SYS_CLK_FREQ_C110
+#define CONFIG_SYS_CLK_FREQ_C110       24000000
+#endif
+
 static int s5p1xx_clock_read_reg(int offset)
 {
        return readl(S5PC1XX_CLOCK_BASE + offset);
@@ -103,14 +110,14 @@ unsigned long get_pll_clk(int pllreg)
        s = r & 0x7;
 
        if (cpu_is_s5pc110()) {
-               if (pllreg == APLL)
-                       fout = m * (CONFIG_SYS_CLK_FREQ / (p * (s * 2 - 1)));
-               else
-                       fout = m * (CONFIG_SYS_CLK_FREQ / (p * s * 2));
-       }
-       else {
-               fout = m * (CONFIG_SYS_CLK_FREQ / (p * (1 << s)));
-       }
+               if (pllreg == APLL) {
+                       if (s < 1)
+                               s = 1;
+                       fout = m * (CONFIG_SYS_CLK_FREQ_C110 / (p * (1 << (s - 1))));
+               } else
+                       fout = m * (CONFIG_SYS_CLK_FREQ_C110 / (p * (1 << s)));
+       } else
+               fout = m * (CONFIG_SYS_CLK_FREQ_C100 / (p * (1 << s)));
 
        return fout;
 }

diff --git a/include/configs/s5pc100_universal.h b/include/configs/s5pc100_universal.h
index d546ddd..5021d78 100644 (file)
--- a/include/configs/s5pc100_universal.h
+++ b/include/configs/s5pc100_universal.h
@@ -35,6 +35,7 @@
 #define CONFIG_SAMSUNG         1       /* in a SAMSUNG core */
 #define CONFIG_S5PC1XX         1       /* which is in a S5PC1XX Family */
 #define CONFIG_S5PC100         1       /* which is in a S5PC100 */
+#define CONFIG_S5PC110         1       /* which is in a S5PC100 */
 #define CONFIG_UNIVERSAL       1       /* working with Universal */
 
 #include <asm/arch/cpu.h>              /* get chip and board defs */
@@ -43,8 +44,9 @@
 
 #define CONFIG_SYS_SDRAM_BASE  0x20000000
 
-/* input clock of PLL: Universal has 12MHz input clock */
-#define CONFIG_SYS_CLK_FREQ    12000000
+/* input clock of PLL: Universal has 12MHz/24MHz input clock at S5PC100/C110 */
+#define CONFIG_SYS_CLK_FREQ_C100       12000000
+#define CONFIG_SYS_CLK_FREQ_C110       24000000
 
 #define CONFIG_MEMORY_UPPER_CODE