drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub

SW must acquire/release one of the vm_invalidate_eng*_sem around the
invalidation req/ack. Through this way,it can avoid losing invalidate
acknowledge state across power-gating off cycle.
To use vm_invalidate_eng*_sem, it needs to initialize
vm_invalidate_eng*_sem firstly.

Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 406736a..b499a3d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -77,6 +77,7 @@ struct amdgpu_gmc_fault {
 struct amdgpu_vmhub {
        uint32_t        ctx0_ptb_addr_lo32;
        uint32_t        ctx0_ptb_addr_hi32;
+       uint32_t        vm_inv_eng0_sem;
        uint32_t        vm_inv_eng0_req;
        uint32_t        vm_inv_eng0_ack;
        uint32_t        vm_context0_cntl;

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 9ec4297..e91bd79 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -367,6 +367,8 @@ void gfxhub_v1_0_init(struct amdgpu_device *adev)
        hub->ctx0_ptb_addr_hi32 =
                SOC15_REG_OFFSET(GC, 0,
                                 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+       hub->vm_inv_eng0_sem =
+               SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_SEM);
        hub->vm_inv_eng0_req =
                SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_REQ);
        hub->vm_inv_eng0_ack =

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
index b4f32d8..b70c7b4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
@@ -356,6 +356,8 @@ void gfxhub_v2_0_init(struct amdgpu_device *adev)
        hub->ctx0_ptb_addr_hi32 =
                SOC15_REG_OFFSET(GC, 0,
                                 mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+       hub->vm_inv_eng0_sem =
+               SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM);
        hub->vm_inv_eng0_req =
                SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ);
        hub->vm_inv_eng0_ack =

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index d7575ac..adfd8a6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -416,6 +416,8 @@ void mmhub_v1_0_init(struct amdgpu_device *adev)
        hub->ctx0_ptb_addr_hi32 =
                SOC15_REG_OFFSET(MMHUB, 0,
                                 mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+       hub->vm_inv_eng0_sem =
+               SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_SEM);
        hub->vm_inv_eng0_req =
                SOC15_REG_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_REQ);
        hub->vm_inv_eng0_ack =

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
index 9455336..a7cb185 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
@@ -348,6 +348,8 @@ void mmhub_v2_0_init(struct amdgpu_device *adev)
        hub->ctx0_ptb_addr_hi32 =
                SOC15_REG_OFFSET(MMHUB, 0,
                                 mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32);
+       hub->vm_inv_eng0_sem =
+               SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_SEM);
        hub->vm_inv_eng0_req =
                SOC15_REG_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_REQ);
        hub->vm_inv_eng0_ack =

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 6fe5c39..753eea2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -505,6 +505,10 @@ void mmhub_v9_4_init(struct amdgpu_device *adev)
                        SOC15_REG_OFFSET(MMHUB, 0,
                            mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) +
                            i * MMHUB_INSTANCE_REGISTER_OFFSET;
+               hub[i]->vm_inv_eng0_sem =
+                       SOC15_REG_OFFSET(MMHUB, 0,
+                                        mmVML2VC0_VM_INVALIDATE_ENG0_SEM) +
+                                        i * MMHUB_INSTANCE_REGISTER_OFFSET;
                hub[i]->vm_inv_eng0_req =
                        SOC15_REG_OFFSET(MMHUB, 0,
                                         mmVML2VC0_VM_INVALIDATE_ENG0_REQ) +