nvc0/ir: allow tess eval output loads to be CSE'd
authorIlia Mirkin <imirkin@alum.mit.edu>
Thu, 30 Apr 2015 06:00:20 +0000 (02:00 -0400)
committerIlia Mirkin <imirkin@alum.mit.edu>
Thu, 23 Jul 2015 07:33:09 +0000 (03:33 -0400)
These only happen for gl_TessCoord which are constant.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp

index ad9bf6f..e9648aa 100644 (file)
@@ -2518,6 +2518,8 @@ Instruction::isResultEqual(const Instruction *that) const
       case FILE_MEMORY_CONST:
       case FILE_SHADER_INPUT:
          return true;
+      case FILE_SHADER_OUTPUT:
+         return bb->getProgram()->getType() == Program::TYPE_TESSELLATION_EVAL;
       default:
          return false;
       }