iio: potentiometer: ad5272: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:57:01 +0000 (18:57 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:19 +0000 (11:53 +0100)
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 79e8a32d2aa9 ("iio: ad5272: Add support for Analog Devices digital potentiometers")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Phil Reid <preid@electromag.com.au>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-82-jic23@kernel.org
drivers/iio/potentiometer/ad5272.c

index d8cbd17..ed5fc0b 100644 (file)
@@ -50,7 +50,7 @@ struct ad5272_data {
        struct i2c_client       *client;
        struct mutex            lock;
        const struct ad5272_cfg *cfg;
-       u8                      buf[2] ____cacheline_aligned;
+       u8                      buf[2] __aligned(IIO_DMA_MINALIGN);
 };
 
 static const struct iio_chan_spec ad5272_channel = {