dmaengine: dw-edma: Change linked list and data blocks offset and sizes

Changes the linked list and data blocks offset and sizes to follow the
recommendation given by the hardware team for the IPK solution.

Although the previous data blocks offset and sizes are still valid and
functional, using them that might present some issues related to the IPK
solution, since this solution is based on FPGA and might be subjected to
timmings constrains.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Link: https://lore.kernel.org/r/f682e7f7f06dc6b2efdd431481d6fb4d762c2c05.1613674948.git.gustavo.pimentel@synopsys.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
index 1055fdbba39066e14c9c2537c71dfae8c930684f..fa66e0380e6d3ee1c5e9d0bb89aac6bf45f6f18b 100644 (file)
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -59,29 +59,29 @@ static const struct dw_edma_pcie_data snps_edda_data = {
        .rg.sz                          = 0x00002000,   /*  8 Kbytes */
        /* eDMA memory linked list location */
        .ll_wr = {
-               /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Mbytes */
-               DW_BLOCK(BAR_2, 0x00000000, 0x00200000)
-               /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Mbytes */
-               DW_BLOCK(BAR_2, 0x00200000, 0x00200000)
+               /* Channel 0 - BAR 2, offset 0 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00000000, 0x00000800)
+               /* Channel 1 - BAR 2, offset 2 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00200000, 0x00000800)
        },
        .ll_rd = {
-               /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Mbytes */
-               DW_BLOCK(BAR_2, 0x00400000, 0x00200000)
-               /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Mbytes */
-               DW_BLOCK(BAR_2, 0x00600000, 0x00200000)
+               /* Channel 0 - BAR 2, offset 4 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00400000, 0x00000800)
+               /* Channel 1 - BAR 2, offset 6 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00600000, 0x00000800)
        },
        /* eDMA memory data location */
        .dt_wr = {
-               /* Channel 0 - BAR 2, offset 8 Mbytes, size 14 Mbytes */
-               DW_BLOCK(BAR_2, 0x00800000, 0x00e00000)
-               /* Channel 1 - BAR 2, offset 22 Mbytes, size 14 Mbytes */
-               DW_BLOCK(BAR_2, 0x01600000, 0x00e00000)
+               /* Channel 0 - BAR 2, offset 8 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00800000, 0x00000800)
+               /* Channel 1 - BAR 2, offset 9 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00900000, 0x00000800)
        },
        .dt_rd = {
-               /* Channel 0 - BAR 2, offset 36 Mbytes, size 14 Mbytes */
-               DW_BLOCK(BAR_2, 0x02400000, 0x00e00000)
-               /* Channel 1 - BAR 2, offset 50 Mbytes, size 14 Mbytes */
-               DW_BLOCK(BAR_2, 0x03200000, 0x00e00000)
+               /* Channel 0 - BAR 2, offset 10 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00a00000, 0x00000800)
+               /* Channel 1 - BAR 2, offset 11 Mbytes, size 2 Kbytes */
+               DW_BLOCK(BAR_2, 0x00b00000, 0x00000800)
        },
        /* Other */
        .mf                             = EDMA_MF_EDMA_UNROLL,