ARM: dts: socfpga: Fix Arria10 GMAC resets
authorMarek Vasut <marex@denx.de>
Mon, 13 Aug 2018 18:24:20 +0000 (20:24 +0200)
committerMarek Vasut <marex@denx.de>
Mon, 13 Aug 2018 20:35:16 +0000 (22:35 +0200)
Add the GMAC0,1 OCP resets, which must also be ungated for those GMACs
to work and add GMAC2 reset and OCP resets which were missing altogether.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/dts/socfpga_arria10.dtsi

index aafcfe9..f5f1b8d 100644 (file)
                        rx-fifo-depth = <16384>;
                        clocks = <&l4_mp_clk>;
                        clock-names = "stmmaceth";
-                       resets = <&rst EMAC0_RESET>;
-                       reset-names = "stmmaceth";
+                       resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
+                       reset-names = "stmmaceth", "stmmaceth-ocp";
                        snps,axi-config = <&socfpga_axi_setup>;
                        status = "disabled";
                };
                        rx-fifo-depth = <16384>;
                        clocks = <&l4_mp_clk>;
                        clock-names = "stmmaceth";
-                       resets = <&rst EMAC1_RESET>;
-                       reset-names = "stmmaceth";
+                       resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
+                       reset-names = "stmmaceth", "stmmaceth-ocp";
                        snps,axi-config = <&socfpga_axi_setup>;
                        status = "disabled";
                };
                        rx-fifo-depth = <16384>;
                        clocks = <&l4_mp_clk>;
                        clock-names = "stmmaceth";
+                       resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
+                       reset-names = "stmmaceth", "stmmaceth-ocp";
                        snps,axi-config = <&socfpga_axi_setup>;
                        status = "disabled";
                };