drm/i915/icl: Wa_1607087056

Avoid possible hang in tsg,vfe units by keeping
l3 clocks runnings.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191015154411.9984-1-mika.kuoppala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index ba65e50..81d299b 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -892,6 +892,11 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
        wa_write_or(wal,
                    GAMT_CHKN_BIT_REG,
                    GAMT_CHKN_DISABLE_L3_COH_PIPE);
+
+       /* Wa_1607087056:icl */
+       wa_write_or(wal,
+                   SLICE_UNIT_LEVEL_CLKGATE,
+                   L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS);
 }
 
 static void

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7dd126c..821159c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4050,6 +4050,8 @@ enum {
 #define  SARBUNIT_CLKGATE_DIS          (1 << 5)
 #define  RCCUNIT_CLKGATE_DIS           (1 << 7)
 #define  MSCUNIT_CLKGATE_DIS           (1 << 10)
+#define  L3_CLKGATE_DIS                        REG_BIT(16)
+#define  L3_CR2X_CLKGATE_DIS           REG_BIT(17)
 
 #define SUBSLICE_UNIT_LEVEL_CLKGATE    _MMIO(0x9524)
 #define  GWUNIT_CLKGATE_DIS            (1 << 16)