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i2c: xiic: Record xilinx i2c with Zynq fragment
author
Michal Simek
<michal.simek@xilinx.com>
Fri, 7 Sep 2018 06:02:05 +0000
(08:02 +0200)
committer
Wolfram Sang
<wsa@the-dreams.de>
Fri, 7 Sep 2018 11:04:45 +0000
(13:04 +0200)
Include xilinx soft i2c controller to Zynq fragment to make clear who is
responsible for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
MAINTAINERS
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diff --git
a/MAINTAINERS
b/MAINTAINERS
index 9ad052aeac39be98b3cb1d390e043f2c7583fd67..d870cb57c887a1c5fa773a8fd9d614c54cb3cce0 100644
(file)
--- a/
MAINTAINERS
+++ b/
MAINTAINERS
@@
-2311,6
+2311,7
@@
F: drivers/clocksource/cadence_ttc_timer.c
F: drivers/i2c/busses/i2c-cadence.c
F: drivers/mmc/host/sdhci-of-arasan.c
F: drivers/edac/synopsys_edac.c
+F: drivers/i2c/busses/i2c-xiic.c
ARM64 PORT (AARCH64 ARCHITECTURE)
M: Catalin Marinas <catalin.marinas@arm.com>