aarch64: Restore generation of SVE UQDEC instructions
authorRichard Sandiford <richard.sandiford@arm.com>
Wed, 25 Jan 2023 11:24:32 +0000 (11:24 +0000)
committerRichard Sandiford <richard.sandiford@arm.com>
Wed, 25 Jan 2023 11:24:32 +0000 (11:24 +0000)
The addition of TARGET_CSSC meant that we wouldn't generate SVE
UQDEC instructions unless +cssc was also enabled.

Fixes:
- gcc.target/aarch64/sve/slp_4.c
- gcc.target/aarch64/sve/slp_10.c
- gcc.target/aarch64/sve/while_4.c

gcc/
* config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
tests.

gcc/config/aarch64/aarch64.md

index e4d7587..0b326d4 100644 (file)
   {
     if (aarch64_sve_cnt_immediate (operands[1], <MODE>mode))
       std::swap (operands[1], operands[2]);
-    else if (!aarch64_sve_cnt_immediate (operands[2], <MODE>mode)
-            && TARGET_CSSC)
+    else if (aarch64_sve_cnt_immediate (operands[2], <MODE>mode))
+      ;
+    else if (TARGET_CSSC)
       {
        if (aarch64_uminmax_immediate (operands[1], <MODE>mode))
          std::swap (operands[1], operands[2]);