x86/apic: Add Hygon Dhyana support
authorPu Wen <puwen@hygon.cn>
Sun, 23 Sep 2018 09:35:28 +0000 (17:35 +0800)
committerBorislav Petkov <bp@suse.de>
Thu, 27 Sep 2018 16:28:58 +0000 (18:28 +0200)
Add Hygon Dhyana support to the APIC subsystem. When running in 32 bit
mode, bigsmp should be enabled if there are more than 8 cores online.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: x86@kernel.org
Cc: thomas.lendacky@amd.com
Link: https://lkml.kernel.org/r/7a557265a8c7c9e842fe60f9d8e064458801aef3.1537533369.git.puwen@hygon.cn
arch/x86/kernel/apic/apic.c
arch/x86/kernel/apic/probe_32.c

index 84132ed..ab731ab 100644 (file)
@@ -224,6 +224,11 @@ static int modern_apic(void)
        if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
            boot_cpu_data.x86 >= 0xf)
                return 1;
+
+       /* Hygon systems use modern APIC */
+       if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
+               return 1;
+
        return lapic_get_version() >= 0x14;
 }
 
@@ -1912,6 +1917,8 @@ static int __init detect_init_APIC(void)
                    (boot_cpu_data.x86 >= 15))
                        break;
                goto no_apic;
+       case X86_VENDOR_HYGON:
+               break;
        case X86_VENDOR_INTEL:
                if (boot_cpu_data.x86 == 6 || boot_cpu_data.x86 == 15 ||
                    (boot_cpu_data.x86 == 5 && boot_cpu_has(X86_FEATURE_APIC)))
index 02e8acb..47ff297 100644 (file)
@@ -185,6 +185,7 @@ void __init default_setup_apic_routing(void)
                                break;
                        }
                        /* If P4 and above fall through */
+               case X86_VENDOR_HYGON:
                case X86_VENDOR_AMD:
                        def_to_bigsmp = 1;
                }