ARM: dts: sunxi: Fix DE2 clocks register range

As it can be seen from DE2 manual, clock range is 0x10000.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c82775 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b299209330 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f0295c ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 53c2b6a..92c6953 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -314,7 +314,7 @@
 
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-a83t-de2-clk";
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_PLL_DE>;
                        clock-names = "bus",

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index d5442b5..b2dd00a 100644 (file)
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -136,7 +136,7 @@
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-r40-de2-clk",
                                     "allwinner,sun8i-h3-de2-clk";
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_DE>;
                        clock-names = "bus",

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 81ea508..e531286 100644 (file)
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -105,7 +105,7 @@
 
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-v3s-de2-clk";
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_DE>;
                        clock-names = "bus",

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index ed39088..d551601 100644 (file)
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -114,7 +114,7 @@
 
                display_clocks: clock@1000000 {
                        /* compatible is in per SoC .dtsi file */
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_DE>;
                        clock-names = "bus",