agx/nir_lower_texture: Allow disabling layer clamping

For background program with layered.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

diff --git a/src/asahi/compiler/agx_compile.h b/src/asahi/compiler/agx_compile.h
index c593511..a376bd0 100644 (file)
--- a/src/asahi/compiler/agx_compile.h
+++ b/src/asahi/compiler/agx_compile.h
@@ -211,6 +211,9 @@ struct agx_shader_key {
    };
 };
 
+/* Texture backend flags */
+#define AGX_TEXTURE_FLAG_NO_CLAMP (1 << 0)
+
 bool agx_nir_lower_texture_early(nir_shader *s);
 
 void agx_preprocess_nir(nir_shader *nir, bool support_lod_bias,

diff --git a/src/asahi/compiler/agx_nir_lower_texture.c b/src/asahi/compiler/agx_nir_lower_texture.c
index ccaa733..a100d3c 100644 (file)
--- a/src/asahi/compiler/agx_nir_lower_texture.c
+++ b/src/asahi/compiler/agx_nir_lower_texture.c
@@ -8,6 +8,7 @@
 #include "compiler/nir/nir.h"
 #include "compiler/nir/nir_builder.h"
 #include "compiler/nir/nir_builtin_builder.h"
+#include "agx_compile.h"
 #include "agx_compiler.h"
 #include "agx_internal_formats.h"
 #include "agx_nir.h"
@@ -364,10 +365,16 @@ lower_regular_texture(nir_builder *b, nir_instr *instr, UNUSED void *data)
       /* Clamp to max layer = (# of layers - 1) for out-of-bounds handling.
        * Layer must be 16-bits for the hardware, drop top bits after clamping.
        */
-      nir_def *txs = nir_get_texture_size(b, tex);
-      nir_def *nr_layers = nir_channel(b, txs, lidx);
-      nir_def *max_layer = nir_iadd_imm(b, nr_layers, -1);
-      layer = nir_u2u16(b, nir_umin(b, unclamped_layer, max_layer));
+      if (!(tex->backend_flags & AGX_TEXTURE_FLAG_NO_CLAMP)) {
+         nir_def *txs = nir_get_texture_size(b, tex);
+         nir_def *nr_layers = nir_channel(b, txs, lidx);
+         nir_def *max_layer = nir_iadd_imm(b, nr_layers, -1);
+         layer = nir_umin(b, unclamped_layer, max_layer);
+      } else {
+         layer = unclamped_layer;
+      }
+
+      layer = nir_u2u16(b, layer);
    }
 
    /* Combine layer and multisample index into 32-bit so we don't need a vec5 or