* cpu.c,model.c,sem-switch.c,sem.c: Regenerated. Mostly comment

	and variable renaming due to macro insn additions.
	* mloop.in: Update to use CGEN_INSN_NUM.
	* cpu.x,modelx.c,readx.c,semx.c: Regenerated.
	* mloopx.in: Update to use CGEN_INSN_NUM.

diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
index d7d0850..5fe5612 100644 (file)
--- a/sim/m32r/ChangeLog
+++ b/sim/m32r/ChangeLog
@@ -1,10 +1,10 @@
 Mon Apr 27 15:36:30 1998  Doug Evans  <devans@seba.cygnus.com>
 
-       * cpu.c,model.c,sem-switch.c,sem.c: Regenerated.  Mostly comment
+       * cpu.h,model.c,sem-switch.c,sem.c: Regenerated.  Mostly comment
        and variable renaming due to macro insn additions.
        * mloop.in: Update to use CGEN_INSN_NUM.
 start-sanitize-m32rx
-       * cpu.x,modelx.c,readx.c,semx.c: Regenerated.
+       * cpux.h,modelx.c,readx.c,semx.c: Regenerated.
        * mloopx.in: Update to use CGEN_INSN_NUM.
 end-sanitize-m32rx
 

diff --git a/sim/m32r/model.c b/sim/m32r/model.c
index f6dbfc6..5012cfb 100644 (file)
--- a/sim/m32r/model.c
+++ b/sim/m32r/model.c
@@ -42,7 +42,7 @@ m32r_model_profile_insn (SIM_CPU *current_cpu, ARGBUF *abuf)
   const MODEL *model = CPU_MODEL (current_cpu);
   const INSN_TIMING *timing = MODEL_TIMING (model);
   const CGEN_INSN *insn = abuf->opcode;
-  const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+  const UNIT *unit = &timing[CGEN_INSN_NUM (insn)].units[0];
   const UNIT *unit_end = unit + MAX_UNITS;
   PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
 
@@ -79,7 +79,7 @@ m32r_model_profile_cti_insn (SIM_CPU *current_cpu, ARGBUF *abuf, int taken_p)
   const MODEL *model = CPU_MODEL (current_cpu);
   const INSN_TIMING *timing = MODEL_TIMING (model);
   const CGEN_INSN *insn = abuf->opcode;
-  const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+  const UNIT *unit = &timing[CGEN_INSN_NUM (insn)].units[0];
   const UNIT *unit_end = unit + MAX_UNITS;
   PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
 
@@ -122,26 +122,18 @@ static const INSN_TIMING m32r_d_timing[] = {
   { { (UQI) UNIT_NONE } }, /* illegal insn */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* add */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* add3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* add3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* and */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* and3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* and3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* or */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* or3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* or3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* xor */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* xor3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* xor3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addi */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addi.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addv */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addv3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addv3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addx */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc8 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc8.s */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc24 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc24.l */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* beq */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* beqz */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bgez */
@@ -150,24 +142,16 @@ static const INSN_TIMING m32r_d_timing[] = {
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bltz */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnez */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl8 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl8.s */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl24 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl24.l */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc8 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc8.s */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc24 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc24.l */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bne */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra8 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra8.s */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra24 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra24.l */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmp */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpi */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpi.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpu */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpui */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpui.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* div */
   { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* divu */
   { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* rem */
@@ -175,34 +159,19 @@ static const INSN_TIMING m32r_d_timing[] = {
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* jl */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* jmp */
   { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ld-d */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ld-d2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb-2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ldb-d */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ldb-d2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh-2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ldh-d */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ldh-d2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub-2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ldub-d */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* ldub-d2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh-2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* lduh-d */
-  { { (UQI) UNIT_M32R_D_U_LOAD, 2, 2 } }, /* lduh-d2 */
   { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-plus */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ld24 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ld24.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8.a */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8a */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8a.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi16 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi16a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* lock */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* machi */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* maclo */
@@ -228,44 +197,28 @@ static const INSN_TIMING m32r_d_timing[] = {
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rach */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rte */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* seth */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* seth.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sll */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sll3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sll3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* slli */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* slli.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sra */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sra3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sra3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srai */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srai.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srl */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srl3 */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srl3.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srli */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srli.a */
   { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st */
-  { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-2 */
   { { (UQI) UNIT_M32R_D_U_STORE, 2, 2 } }, /* st-d */
-  { { (UQI) UNIT_M32R_D_U_STORE, 2, 2 } }, /* st-d2 */
   { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb */
-  { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb-2 */
   { { (UQI) UNIT_M32R_D_U_STORE, 2, 2 } }, /* stb-d */
-  { { (UQI) UNIT_M32R_D_U_STORE, 2, 2 } }, /* stb-d2 */
   { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth */
-  { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth-2 */
   { { (UQI) UNIT_M32R_D_U_STORE, 2, 2 } }, /* sth-d */
-  { { (UQI) UNIT_M32R_D_U_STORE, 2, 2 } }, /* sth-d2 */
   { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-plus */
   { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-minus */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sub */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* subv */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* subx */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* trap */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* trap.a */
   { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* unlock */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* push */
-  { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* pop */
 };
 
 /* Model timing data for `test'.  */
@@ -274,26 +227,18 @@ static const INSN_TIMING test_timing[] = {
   { { (UQI) UNIT_NONE } }, /* illegal insn */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* add */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* add3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* add3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* and */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* and3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* and3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* or */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* or3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* or3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* xor */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* xor3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* xor3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addi */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addi.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addv */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addv3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addv3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addx */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc8 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc8.s */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc24 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc24.l */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* beq */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* beqz */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bgez */
@@ -302,24 +247,16 @@ static const INSN_TIMING test_timing[] = {
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bltz */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnez */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl8 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl8.s */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl24 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl24.l */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc8 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc8.s */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc24 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc24.l */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bne */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra8 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra8.s */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra24 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra24.l */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmp */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpi */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpi.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpu */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpui */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpui.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* div */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* divu */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rem */
@@ -327,34 +264,19 @@ static const INSN_TIMING test_timing[] = {
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* jl */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* jmp */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-plus */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld24 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld24.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8.a */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8a */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8a.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi16 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi16a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lock */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* machi */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* maclo */
@@ -380,44 +302,28 @@ static const INSN_TIMING test_timing[] = {
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rach */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rte */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* seth */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* seth.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sll */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sll3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sll3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* slli */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* slli.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sra */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sra3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sra3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srai */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srai.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srl */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srl3 */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srl3.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srli */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srli.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-d */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-d2 */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-plus */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-minus */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sub */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* subv */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* subx */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* trap */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* trap.a */
   { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* unlock */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* push */
-  { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* pop */
 };
 
 #endif /* WITH_PROFILE_MODEL_P */

diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c
index fda2e48..df080b6 100644 (file)
--- a/sim/m32r/modelx.c
+++ b/sim/m32r/modelx.c
@@ -42,7 +42,7 @@ m32rx_model_profile_insn (SIM_CPU *current_cpu, ARGBUF *abuf)
   const MODEL *model = CPU_MODEL (current_cpu);
   const INSN_TIMING *timing = MODEL_TIMING (model);
   const CGEN_INSN *insn = abuf->opcode;
-  const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+  const UNIT *unit = &timing[CGEN_INSN_NUM (insn)].units[0];
   const UNIT *unit_end = unit + MAX_UNITS;
   PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
 
@@ -67,7 +67,7 @@ m32rx_model_profile_cti_insn (SIM_CPU *current_cpu, ARGBUF *abuf, int taken_p)
   const MODEL *model = CPU_MODEL (current_cpu);
   const INSN_TIMING *timing = MODEL_TIMING (model);
   const CGEN_INSN *insn = abuf->opcode;
-  const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
+  const UNIT *unit = &timing[CGEN_INSN_NUM (insn)].units[0];
   const UNIT *unit_end = unit + MAX_UNITS;
   PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
 
@@ -97,26 +97,18 @@ static const INSN_TIMING m32rx_timing[] = {
   { { (UQI) UNIT_NONE } }, /* illegal insn */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* add */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* add3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* add3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* and */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* and3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* and3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* or */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* or3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* or3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* xor */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* xor3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* xor3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addi */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addi.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addv */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addv3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addv3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* addx */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bc24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* beq */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* beqz */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bgez */
@@ -125,82 +117,59 @@ static const INSN_TIMING m32rx_timing[] = {
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bltz */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnez */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bl24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bcl24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bnc24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bne */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bra24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl8.s */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* bncl24.l */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmp */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpi */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpi.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpu */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpui */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpui.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpeq */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* cmpz */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* div */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* divu */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rem */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* remu */
-  { { (UQI) UNIT_M32RX_U_EXEC, 27, 27 } }, /* divh */
+  { { (UQI) UNIT_M32RX_U_EXEC, 21, 21 } }, /* divh */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jc */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jnc */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jl */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* jmp */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldb-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldh-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldub-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lduh-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld-plus */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld24 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ld24.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8.a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi8a.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi16 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* ldi16a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* lock */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* machi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* maclo-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* macwhi */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* macwlo */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mul */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mulhi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mullo-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mulwhi */
+  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mulwlo */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mv */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfachi-a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfaclo-a */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfacmi-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 2, 2 } }, /* mvfachi-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 2, 2 } }, /* mvfaclo-a */
+  { { (UQI) UNIT_M32RX_U_EXEC, 2, 2 } }, /* mvfacmi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvfc */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvtachi-a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* mvtaclo-a */
@@ -208,52 +177,32 @@ static const INSN_TIMING m32rx_timing[] = {
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* neg */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* nop */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* not */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rac-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rac-ds */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rac-dsi */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rach-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rach-ds */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rach-dsi */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* rte */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* seth */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* seth.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sll */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sll3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sll3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* slli */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* slli.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sra */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sra3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sra3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srai */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srai.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srl */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srl3 */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srl3.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srli */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* srli.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* stb-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth-2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth-d */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sth-d2 */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-plus */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* st-minus */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sub */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* subv */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* subx */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* trap */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* trap.a */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* unlock */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* push */
-  { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* pop */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* satb */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sath */
   { { (UQI) UNIT_M32RX_U_EXEC, 1, 1 } }, /* sat */

diff --git a/sim/m32r/readx.c b/sim/m32r/readx.c
index ed99bb1..6859c2f 100644 (file)
--- a/sim/m32r/readx.c
+++ b/sim/m32r/readx.c
@@ -280,7 +280,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BC8) : /* e.g. bc $disp8 */
+    CASE (read, READ_FMT_BC8) : /* e.g. bc.s $disp8 */
     {
 #define OPRND(f) par_exec->operands.fmt_bc8.f
   EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
@@ -293,7 +293,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BC24) : /* e.g. bc $disp24 */
+    CASE (read, READ_FMT_BC24) : /* e.g. bc.l $disp24 */
     {
 #define OPRND(f) par_exec->operands.fmt_bc24.f
   EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
@@ -333,7 +333,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BL8) : /* e.g. bl $disp8 */
+    CASE (read, READ_FMT_BL8) : /* e.g. bl.s $disp8 */
     {
 #define OPRND(f) par_exec->operands.fmt_bl8.f
   EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
@@ -346,7 +346,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BL24) : /* e.g. bl $disp24 */
+    CASE (read, READ_FMT_BL24) : /* e.g. bl.l $disp24 */
     {
 #define OPRND(f) par_exec->operands.fmt_bl24.f
   EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
@@ -359,7 +359,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BCL8) : /* e.g. bcl $disp8 */
+    CASE (read, READ_FMT_BCL8) : /* e.g. bcl.s $disp8 */
     {
 #define OPRND(f) par_exec->operands.fmt_bcl8.f
   EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
@@ -373,7 +373,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BCL24) : /* e.g. bcl $disp24 */
+    CASE (read, READ_FMT_BCL24) : /* e.g. bcl.l $disp24 */
     {
 #define OPRND(f) par_exec->operands.fmt_bcl24.f
   EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
@@ -387,7 +387,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BRA8) : /* e.g. bra $disp8 */
+    CASE (read, READ_FMT_BRA8) : /* e.g. bra.s $disp8 */
     {
 #define OPRND(f) par_exec->operands.fmt_bra8.f
   EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
@@ -399,7 +399,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_BRA24) : /* e.g. bra $disp24 */
+    CASE (read, READ_FMT_BRA24) : /* e.g. bra.l $disp24 */
     {
 #define OPRND(f) par_exec->operands.fmt_bra24.f
   EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
@@ -606,7 +606,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_LDI8) : /* e.g. ldi $dr,$simm8 */
+    CASE (read, READ_FMT_LDI8) : /* e.g. ldi8 $dr,$simm8 */
     {
 #define OPRND(f) par_exec->operands.fmt_ldi8.f
   EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
@@ -618,7 +618,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
     }
     BREAK (read);
 
-    CASE (read, READ_FMT_LDI16) : /* e.g. ldi $dr,$hash$slo16 */
+    CASE (read, READ_FMT_LDI16) : /* e.g. ldi16 $dr,$hash$slo16 */
     {
 #define OPRND(f) par_exec->operands.fmt_ldi16.f
   EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */

diff --git a/sim/m32r/semx.c b/sim/m32r/semx.c
index 864c05f..0007eaa 100644 (file)
--- a/sim/m32r/semx.c
+++ b/sim/m32r/semx.c
@@ -380,7 +380,7 @@ do {
 #undef OPRND
 }
 
-/* Perform bc8: bc $disp8.  */
+/* Perform bc8: bc.s $disp8.  */
 CIA
 SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -408,7 +408,7 @@ if (OPRND (condbit)) {
 #undef OPRND
 }
 
-/* Perform bc24: bc $disp24.  */
+/* Perform bc24: bc.l $disp24.  */
 CIA
 SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -639,7 +639,7 @@ if (NESI (OPRND (src2), 0)) {
 #undef OPRND
 }
 
-/* Perform bl8: bl $disp8.  */
+/* Perform bl8: bl.s $disp8.  */
 CIA
 SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -670,7 +670,7 @@ do {
 #undef OPRND
 }
 
-/* Perform bl24: bl $disp24.  */
+/* Perform bl24: bl.l $disp24.  */
 CIA
 SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -701,7 +701,7 @@ do {
 #undef OPRND
 }
 
-/* Perform bcl8: bcl $disp8.  */
+/* Perform bcl8: bcl.s $disp8.  */
 CIA
 SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -734,7 +734,7 @@ do {
 #undef OPRND
 }
 
-/* Perform bcl24: bcl $disp24.  */
+/* Perform bcl24: bcl.l $disp24.  */
 CIA
 SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -748,7 +748,7 @@ SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
 
 if (OPRND (condbit)) {
 do {
-  CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
+  CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
@@ -767,7 +767,7 @@ do {
 #undef OPRND
 }
 
-/* Perform bnc8: bnc $disp8.  */
+/* Perform bnc8: bnc.s $disp8.  */
 CIA
 SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -795,7 +795,7 @@ if (NOTBI (OPRND (condbit))) {
 #undef OPRND
 }
 
-/* Perform bnc24: bnc $disp24.  */
+/* Perform bnc24: bnc.l $disp24.  */
 CIA
 SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -852,7 +852,7 @@ if (NESI (OPRND (src1), OPRND (src2))) {
 #undef OPRND
 }
 
-/* Perform bra8: bra $disp8.  */
+/* Perform bra8: bra.s $disp8.  */
 CIA
 SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -878,7 +878,7 @@ SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
 #undef OPRND
 }
 
-/* Perform bra24: bra $disp24.  */
+/* Perform bra24: bra.l $disp24.  */
 CIA
 SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -904,7 +904,7 @@ SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_e
 #undef OPRND
 }
 
-/* Perform bncl8: bncl $disp8.  */
+/* Perform bncl8: bncl.s $disp8.  */
 CIA
 SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -937,7 +937,7 @@ do {
 #undef OPRND
 }
 
-/* Perform bncl24: bncl $disp24.  */
+/* Perform bncl24: bncl.l $disp24.  */
 CIA
 SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -951,7 +951,7 @@ SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_
 
 if (NOTBI (OPRND (condbit))) {
 do {
-  CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
+  CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
@@ -1721,7 +1721,7 @@ SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
 #undef OPRND
 }
 
-/* Perform ldi8: ldi $dr,$simm8.  */
+/* Perform ldi8: ldi8 $dr,$simm8.  */
 CIA
 SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {
@@ -1747,7 +1747,7 @@ SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_ex
 #undef OPRND
 }
 
-/* Perform ldi16: ldi $dr,$hash$slo16.  */
+/* Perform ldi16: ldi16 $dr,$hash$slo16.  */
 CIA
 SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 {