radv: optimize radv_stage_flush() for pre fragment shader stages
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Tue, 17 Jul 2018 15:03:26 +0000 (17:03 +0200)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 18 Jul 2018 08:09:05 +0000 (10:09 +0200)
We don't need to emit PS_PARTIAL_FLUSH for the pre fragment shader
stages (ie. geometry/tessellation). Emitting VS_PARTIAL_FLUSH
is enough for these stages. Note that PS_PARTIAL_FLUSH also
synchronizes all vertex stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_cmd_buffer.c

index 3646c1a..041ebf0 100644 (file)
@@ -1942,10 +1942,7 @@ static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer,
                cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH;
        }
 
-       if (src_stage_mask & (VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT |
-                             VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT |
-                             VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT |
-                             VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT |
+       if (src_stage_mask & (VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT |
                              VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT |
                              VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT |
                              VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT |
@@ -1956,7 +1953,10 @@ static void radv_stage_flush(struct radv_cmd_buffer *cmd_buffer,
                cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH;
        } else if (src_stage_mask & (VK_PIPELINE_STAGE_DRAW_INDIRECT_BIT |
                                     VK_PIPELINE_STAGE_VERTEX_INPUT_BIT |
-                                    VK_PIPELINE_STAGE_VERTEX_SHADER_BIT)) {
+                                    VK_PIPELINE_STAGE_VERTEX_SHADER_BIT |
+                                    VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT |
+                                    VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT |
+                                    VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT)) {
                cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH;
        }
 }