* gdb.base/maint.exp: set data_section to ".neardata".
* gdb.base/savedregs.c (thrower): Trigger SIGILL on NO-MMU machine.
* gdb.base/savedregs.exp: Handle SIGILL.
* gdb.mi/mi-syn-frame.c (bar): Trigger SIGILL on NO-MMU machine.
* gdb.xml/tdesc-regs.exp: Set core-regs for tic6x-*-*.
+2011-08-14 Yao Qi <yao@codesourcery.com>
+
+ * gdb.base/maint.exp: set data_section to ".neardata".
+ * gdb.base/savedregs.c (thrower): Trigger SIGILL on NO-MMU machine.
+ * gdb.base/savedregs.exp: Handle SIGILL.
+ * gdb.mi/mi-syn-frame.c (bar): Trigger SIGILL on NO-MMU machine.
+ * gdb.xml/tdesc-regs.exp: Set core-regs for tic6x-*-*.
+
2011-08-12 Doug Evans <dje@google.com>
* gdb.python/py-symbol.exp: Add test for symbol.type.
set data_section ER_RW
pass "maint info sections"
}
+ -re "Exec file:\r\n.*break($EXEEXT)?., file type.*neardata.*$gdb_prompt $" {
+ # c6x doesn't have .data section. It has .neardata and .fardata section.
+ set data_section ".neardata"
+ pass "maint info sections"
+ }
-re "Exec file:\r\n.*break($EXEEXT)?., file type.*$gdb_prompt $" {
pass "maint info sections"
}
static void
thrower (void)
{
+ /* Trigger a SIGSEGV. */
*(char *)0 = 0;
+
+ /* On MMU-less system, previous memory access to address zero doesn't
+ trigger a SIGSEGV. Trigger a SIGILL. Each arch should define its
+ own illegal instruction here. */
+
+#if defined(__arm__)
+ asm(".word 0xf8f00000");
+#elif defined(__TMS320C6X__)
+ asm(".word 0x56454313");
+#else
+#endif
+
}
main ()
{
+ signal (SIGILL, catcher);
signal (SIGSEGV, catcher);
thrower ();
}
# Continue to the signal catcher, check main's saved-reg info, capture
# catcher's saved-reg info.
gdb_test "handle SIGSEGV pass print nostop"
+gdb_test "handle SIGILL pass print nostop"
gdb_test "advance catcher" "catcher .* at .*"
process_saved_regs catcher { sigtramp thrower } { main }
void
bar (void)
{
- char *nuller = 0;
+ *(char *)0 = 0; /* try to cause a segfault */
+
+ /* On MMU-less system, previous memory access to address zero doesn't
+ trigger a SIGSEGV. Trigger a SIGILL. Each arch should define its
+ own illegal instruction here. */
+#if defined(__arm__)
+ asm(".word 0xf8f00000");
+#elif defined(__TMS320C6X__)
+ asm(".word 0x56454313");
+#else
+#endif
- *nuller = 'a'; /* try to cause a segfault */
}
void
unsupported "register tests"
return 0
}
+ "tic6x-*-*" {
+ set core-regs {tic6x-core.xml}
+ }
"i?86-*-*" {
set architecture "i386"
set regdir "i386/"