memory-barriers.txt: Fix typo in pairing example
authorScott Tsai <scottt@scottt.tw>
Tue, 19 Sep 2017 18:16:00 +0000 (02:16 +0800)
committerPaul E. McKenney <paulmck@linux.vnet.ibm.com>
Fri, 20 Oct 2017 18:09:32 +0000 (11:09 -0700)
In the "general barrier pairing with implicit control depdendency"
example, the last write by CPU 1 was meant to change variable x and not
y. The example would be pretty uninteresting if no CPU ever changes x
and the variable was initialized to zero.

Signed-off-by: Scott Tsai <scottt@scottt.tw>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Documentation/memory-barriers.txt

index 7deee14..f373755 100644 (file)
@@ -947,7 +947,7 @@ Or even:
        ===============       ===============================
        r1 = READ_ONCE(y);
        <general barrier>
-       WRITE_ONCE(y, 1);     if (r2 = READ_ONCE(x)) {
+       WRITE_ONCE(x, 1);     if (r2 = READ_ONCE(x)) {
                                 <implicit control dependency>
                                 WRITE_ONCE(y, 1);
                              }