arm: rmobile: Fix HDMI output for BLANCHE board

This commit fixes HDMI output for BLANCHE board

Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index 717c169..b2e2e3b 100644 (file)
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -36,8 +36,23 @@ struct pin_db {
 };
 
 #define        PMMR            0xE6060000
+#define        GPSR0           0xE6060004
+#define        GPSR1           0xE6060008
+#define        GPSR4           0xE6060014
+#define        GPSR5           0xE6060018
+#define        GPSR6           0xE606001C
+#define        GPSR7           0xE6060020
+#define        GPSR8           0xE6060024
+#define        GPSR9           0xE6060028
 #define        GPSR10          0xE606002C
+#define        GPSR11          0xE6060030
+#define        IPSR6           0xE6060058
+#define        PUPR2           0xE6060108
 #define        PUPR3           0xE606010C
+#define        PUPR4           0xE6060110
+#define        PUPR5           0xE6060114
+#define        PUPR7           0xE606011C
+#define        PUPR9           0xE6060124
 #define        PUPR10          0xE6060128
 #define        PUPR11          0xE606012C
 
@@ -56,11 +71,26 @@ struct pin_db {
 }
 
 struct pin_db  pin_guard[] = {
+       { GPSR0,        0xFFFFFFFF,     0x0BFFFFFF },
+       { GPSR1,        0xFFFFFFFF,     0x002FFFFF },
+       { GPSR4,        0xFFFFFFFF,     0x00000FFF },
+       { GPSR5,        0xFFFFFFFF,     0x00010FFF },
+       { GPSR6,        0xFFFFFFFF,     0x00010FFF },
+       { GPSR7,        0xFFFFFFFF,     0x00010FFF },
+       { GPSR8,        0xFFFFFFFF,     0x00010FFF },
+       { GPSR9,        0xFFFFFFFF,     0x00010FFF },
        { GPSR10,       0xFFFFFFFF,     0x04006000 },
+       { GPSR11,       0xFFFFFFFF,     0x303FEFE0 },
+       { IPSR6,        0xFFFFFFFF,     0x0002000E },
 };
 
 struct pin_db  pin_tbl[] = {
+       { PUPR2,        0xFFFFFFFF,     0x00000000 },
        { PUPR3,        0xFFFFFFFF,     0x0803FF40 },
+       { PUPR4,        0xFFFFFFFF,     0x0000FFFF },
+       { PUPR5,        0xFFFFFFFF,     0x00010FFF },
+       { PUPR7,        0xFFFFFFFF,     0x0001AFFF },
+       { PUPR9,        0xFFFFFFFF,     0x0001CFFF },
        { PUPR10,       0xFFFFFFFF,     0xC0438001 },
        { PUPR11,       0xFFFFFFFF,     0x0FC00007 },
 };