+2005-09-30 Kazu Hirata <kazu@codesourcery.com>
+
+ * tree-vect-transform.c, config/ms1/ms1.md,
+ config/s390/s390.c, config/v850/v850.md: Fix comment typos.
+ Follow spelling conventions.
+ * doc/invoke.texi, doc/md.texi: Fix typos.
+
2005-09-30 Andrew Macleod <amacleod@redat.com>
PR tree-optimization/21430
DONE;
}
- /* If the load is a psuedo register in a stack slot, some simplification
+ /* If the load is a pseudo register in a stack slot, some simplification
can be made because the loads are aligned */
if ( (! TARGET_BYTE_ACCESS)
&& (reload_in_progress && GET_CODE (operands[1]) == SUBREG
DONE;
}
- /* If the load is a psuedo register in a stack slot, some simplification
+ /* If the load is a pseudo register in a stack slot, some simplification
can be made because the loads are aligned */
if ( (reload_in_progress && GET_CODE (operands[1]) == SUBREG
&& GET_CODE (SUBREG_REG (operands[1])) == REG
Overlapping operations would otherwise be recognized by the S/390 hardware
and would fall back to a slower implementation. Allowing overlapping
operations would lead to slow code but not to wrong code. Therefore we are
- somewhat optimistict if we cannot prove that the memory blocks are
+ somewhat optimistic if we cannot prove that the memory blocks are
overlapping.
That's why we return false here although this may accept operations on
overlapping memory areas. */
/* Branch to the default label if out of range of the table. */
emit_jump_insn (gen_bgtu (operands[4]));
- /* Disabled because the switch pattern is not being recognised
+ /* Disabled because the switch pattern is not being recognized
properly at the moment. eg. compiling vfscanf.c in newlib. */
if (0 && ! TARGET_BIG_SWITCH && TARGET_V850E)
{
Large expressions slow the analyzer.
@item vect-max-version-checks
-The maxinum number of runtime checks that can be performed when doing
+The maximum number of runtime checks that can be performed when doing
loop versioning in the vectorizer. See option ftree-vect-loop-version
for more information.
@cindex @code{reduc_splus_@var{m}} instruction pattern
@item @samp{reduc_splus_@var{m}}
-Compute the sum of the signed elements of a vector. The vector is opernad 1,
-and the scalar result is stored in the least significant bits of opernad 0
+Compute the sum of the signed elements of a vector. The vector is operand 1,
+and the scalar result is stored in the least significant bits of operand 0
(also a vector). The output and input vector should have the same modes.
@cindex @code{reduc_uplus_@var{m}} instruction pattern
@item @samp{reduc_uplus_@var{m}}
-Compute the sum of the unsigned elements of a vector. The vector is opernad 1,
-and the scalar result is stored in the least significant bits of opernad 0
+Compute the sum of the unsigned elements of a vector. The vector is operand 1,
+and the scalar result is stored in the least significant bits of operand 0
(also a vector). The output and input vector should have the same modes.
@cindex @code{vec_shl_@var{m}} instruction pattern
the value of the parameter and no global variables are touched
which makes the builtin a "const" function. Requiring the
builtin to have the "const" attribute makes it unnecessary
- to call mark_call_clobbered_vars_to_rename. */
+ to call mark_call_clobbered. */
gcc_assert (TREE_READONLY (builtin_decl));
}
else