ARM: dts: add Exynos4 and Exynos5 clock controller nodes
authorThomas Abraham <thomas.abraham@linaro.org>
Sat, 9 Mar 2013 08:11:33 +0000 (17:11 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Mon, 25 Mar 2013 09:18:05 +0000 (18:18 +0900)
Add clock controller nodes for EXYNOS4210, EXYNOS4x12, EXYNOS5250
and EXYNOS5440 SoCs.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos4210.dtsi
arch/arm/boot/dts/exynos4x12.dtsi
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/boot/dts/exynos5440.dtsi

index 49a2786..65fa86d 100644 (file)
                };
        };
 
+       clock: clock-controller@0x10030000 {
+               compatible = "samsung,exynos4210-clock";
+               reg = <0x10030000 0x20000>;
+               #clock-cells = <1>;
+       };
+
        pinctrl_0: pinctrl@11400000 {
                compatible = "samsung,exynos4210-pinctrl";
                reg = <0x11400000 0x1000>;
index 9a87806..7496b8d 100644 (file)
                             <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>;
        };
 
+       clock: clock-controller@0x10030000 {
+               compatible = "samsung,exynos4412-clock";
+               reg = <0x10030000 0x20000>;
+               #clock-cells = <1>;
+       };
+
        pinctrl_0: pinctrl@11400000 {
                compatible = "samsung,exynos4x12-pinctrl";
                reg = <0x11400000 0x1000>;
index 4fe76bf..0fcabd7 100644 (file)
                reg = <0x10044040 0x20>;
        };
 
+       clock: clock-controller@0x10010000 {
+               compatible = "samsung,exynos5250-clock";
+               reg = <0x10010000 0x30000>;
+               #clock-cells = <1>;
+       };
+
        gic:interrupt-controller@10481000 {
                compatible = "arm,cortex-a9-gic";
                #interrupt-cells = <3>;
index 5c5a699..f5834d0 100644 (file)
 
        interrupt-parent = <&gic>;
 
+       clock: clock-controller@0x160000 {
+               compatible = "samsung,exynos5440-clock";
+               reg = <0x160000 0x1000>;
+               #clock-cells = <1>;
+       };
+
        gic:interrupt-controller@2E0000 {
                compatible = "arm,cortex-a15-gic";
                #interrupt-cells = <3>;