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R600: Drop use of cached TargetMachine in R600InstrInfo.cpp
author
Tom Stellard
<thomas.stellard@amd.com>
Fri, 13 Jun 2014 01:31:56 +0000
(
01:31
+0000)
committer
Tom Stellard
<thomas.stellard@amd.com>
Fri, 13 Jun 2014 01:31:56 +0000
(
01:31
+0000)
llvm-svn: 210868
llvm/lib/Target/R600/R600InstrInfo.cpp
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diff --git
a/llvm/lib/Target/R600/R600InstrInfo.cpp
b/llvm/lib/Target/R600/R600InstrInfo.cpp
index
b0d9ae3
..
fc3c2c5
100644
(file)
--- a/
llvm/lib/Target/R600/R600InstrInfo.cpp
+++ b/
llvm/lib/Target/R600/R600InstrInfo.cpp
@@
-1067,7
+1067,8
@@
unsigned int R600InstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
void R600InstrInfo::reserveIndirectRegisters(BitVector &Reserved,
const MachineFunction &MF) const {
const AMDGPUFrameLowering *TFL =
- static_cast<const AMDGPUFrameLowering*>(TM.getFrameLowering());
+ static_cast<const AMDGPUFrameLowering*>(
+ MF.getTarget().getFrameLowering());
unsigned StackWidth = TFL->getStackWidth(MF);
int End = getIndirectIndexEnd(MF);