MX5: Add definitions for SATA controller
authorStefano Babic <sbabic@denx.de>
Wed, 22 Feb 2012 00:24:36 +0000 (00:24 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tue, 15 May 2012 06:31:30 +0000 (08:31 +0200)
Add base address and MXC_SATA_CLK to return
the clock used for the SATA controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
arch/arm/cpu/armv7/mx5/clock.c
arch/arm/include/asm/arch-mx5/clock.h
arch/arm/include/asm/arch-mx5/imx-regs.h

index e92f106..8f8d01c 100644 (file)
@@ -380,6 +380,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
        case MXC_FEC_CLK:
                return decode_pll(mxc_plls[PLL1_CLOCK],
                                    CONFIG_SYS_MX5_HCLK);
+       case MXC_SATA_CLK:
+               return get_ahb_clk();
        default:
                break;
        }
index ea972a3..f9f82f3 100644 (file)
@@ -32,6 +32,7 @@ enum mxc_clock {
        MXC_UART_CLK,
        MXC_CSPI_CLK,
        MXC_FEC_CLK,
+       MXC_SATA_CLK,
 };
 
 unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);
index 07296b5..a4245a3 100644 (file)
@@ -43,6 +43,7 @@
 #define NFC_BASE_ADDR_AXI       0xF7FF0000
 #define IRAM_BASE_ADDR          0xF8000000
 #define CS1_BASE_ADDR           0xF4000000
+#define SATA_BASE_ADDR         0x10000000
 #else
 #error "CPU_TYPE not defined"
 #endif