(set_attr "mode" "SI")])
;; Highpart multiplication peephole2s to tweak register allocation.
-;; mov %rdx,imm; mov %rax,%rdi; imulq %rdx -> mov %rax,imm; imulq %rdi
+;; mov imm,%rdx; mov %rdi,%rax; imulq %rdx -> mov imm,%rax; imulq %rdi
(define_peephole2
[(set (match_operand:SWI48 0 "general_reg_operand")
(match_operand:SWI48 1 "immediate_operand"))
(any_mul_highpart:SWI48 (match_dup 2) (match_dup 0)))
(clobber (match_dup 2))
(clobber (reg:CC FLAGS_REG))])]
- "REGNO (operands[0]) != REGNO (operands[2])
+ "REGNO (operands[3]) != AX_REG
+ && REGNO (operands[0]) != REGNO (operands[2])
&& REGNO (operands[0]) != REGNO (operands[3])
&& (REGNO (operands[0]) == REGNO (operands[4])
|| peep2_reg_dead_p (3, operands[0]))"
(any_mul_highpart:SI (match_dup 2) (match_dup 0))))
(clobber (match_dup 2))
(clobber (reg:CC FLAGS_REG))])]
- "REGNO (operands[0]) != REGNO (operands[2])
+ "TARGET_64BIT
+ && REGNO (operands[3]) != AX_REG
+ && REGNO (operands[0]) != REGNO (operands[2])
+ && REGNO (operands[2]) != REGNO (operands[3])
&& REGNO (operands[0]) != REGNO (operands[3])
&& (REGNO (operands[0]) == REGNO (operands[4])
|| peep2_reg_dead_p (3, operands[0]))"
--- /dev/null
+/* { dg-do run } */
+/* { dg-options "-O2" } */
+
+#include <stdlib.h>
+
+struct wrapper_t
+{
+ long k;
+ long e;
+};
+
+struct wrapper_t **table;
+
+__attribute__ ((weak, regparm (2)))
+void
+update (long k, long e)
+{
+ struct wrapper_t *elmt;
+
+ elmt = table[k % 3079];
+ if (elmt == 0)
+ return;
+ elmt->e = e;
+}
+
+int
+main ()
+{
+ table = (struct wrapper_t **) malloc (20 * sizeof (struct wrapper_t *));
+ for (int i = 0; i < 20; i++)
+ table[i] = (struct wrapper_t *) calloc (sizeof (struct wrapper_t), 1);
+ if (table[10]->e != 0)
+ abort ();
+ update (10, 20);
+ if (table[10]->e != 20)
+ abort ();
+ return 0;
+}