[Tizen] Add coreclr skips for RPI4 for armhf

These are a subset of src/tests/issues.targets

diff --git a/unsupportedTests.arm.txt b/unsupportedTests.arm.txt
new file mode 100644 (file)
index 0000000..6130b67
--- /dev/null
+++ b/unsupportedTests.arm.txt
@@ -0,0 +1,25 @@
+GC/Features/BackgroundGC/foregroundgc/foregroundgc.sh
+GC/LargeMemory/Allocation/finalizertest/finalizertest.sh
+GC/Regressions/dev10bugs/536168/536168/536168.sh
+Interop/ExecInDefAppDom/ExecInDefAppDom/ExecInDefAppDom.sh
+JIT/Directed/PREFIX/unaligned/1/arglist_Target_ARM/arglist_Target_ARM.sh
+JIT/Directed/PREFIX/unaligned/2/arglist_Target_ARM/arglist_Target_ARM.sh
+JIT/Directed/PREFIX/unaligned/4/arglist_Target_ARM/arglist_Target_ARM.sh
+JIT/Directed/PREFIX/volatile/1/arglist_Target_ARM/arglist_Target_ARM.sh
+JIT/Directed/arglist/vararg_TargetUnix/vararg_TargetUnix.sh
+JIT/Methodical/Coverage/arglist_pos/arglist_pos.sh
+JIT/Methodical/refany/_il_dbgseq/_il_dbgseq.sh
+JIT/Methodical/refany/_il_relseq/_il_relseq.sh
+JIT/Regression/CLR-x86-EJIT/V1-M12-Beta2/b26323/b26323/b26323.sh
+JIT/Regression/CLR-x86-JIT/V1-M09.5-PDC/b16423/b16423/b16423.sh
+JIT/Regression/CLR-x86-JIT/V1-M11-Beta1/b41391/b41391/b41391.sh
+JIT/Regression/CLR-x86-JIT/V1-M12-Beta2/b31746/b31746/b31746.sh
+JIT/Regression/CLR-x86-JIT/V1-M12-Beta2/b37646/b37646/b37646.sh
+JIT/Regression/CLR-x86-JIT/V1-M12-Beta2/b41852/b41852/b41852.sh
+JIT/jit64/mcc/interop/mcc_i00/mcc_i00.sh
+JIT/superpmi/superpmicollect/superpmicollect.sh
+Loader/AssemblyDependencyResolver/MissingHostPolicyTests/MissingHostPolicyTests/MissingHostPolicyTests.sh
+Regressions/coreclr/GitHub_22888/test22888/test22888.sh
+baseservices/mono/runningmono/runningmono.sh
+readytorun/DynamicMethodGCStress/DynamicMethodGCStress/DynamicMethodGCStress.sh
+readytorun/r2rdump/FrameworkTests/R2RDumpTests/R2RDumpTests.sh