The axidma irq orders are reversed in both the device model and the instantion.
Undid both reversal (for no net change). Also needs to be reversed for
consistency with Xilinx tools IRQ listing.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq2);
- sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq);
+ sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+ sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq2);
return dev;
}
struct XilinxAXIDMA *s = FROM_SYSBUS(typeof(*s), dev);
int i;
- sysbus_init_irq(dev, &s->streams[1].irq);
sysbus_init_irq(dev, &s->streams[0].irq);
+ sysbus_init_irq(dev, &s->streams[1].irq);
if (!s->dmach) {
hw_error("Unconnected DMA channel.\n");