td_file = "AArch64.td"
}
+tablegen("AArch64GenO0PreLegalizeGICombiner") {
+ visibility = [ ":LLVMAArch64CodeGen" ]
+ args = [
+ "-gen-global-isel-combiner",
+ "-combiners=AArch64O0PreLegalizerCombinerHelper",
+ ]
+ td_file = "AArch64.td"
+}
+
tablegen("AArch64GenGlobalISel") {
visibility = [ ":LLVMAArch64CodeGen" ]
args = [ "-gen-global-isel" ]
":AArch64GenFastISel",
":AArch64GenGlobalISel",
":AArch64GenMCPseudoLowering",
+ ":AArch64GenO0PreLegalizeGICombiner",
":AArch64GenPostLegalizeGICombiner",
":AArch64GenPostLegalizeGILowering",
":AArch64GenPreLegalizeGICombiner",
"GISel/AArch64GlobalISelUtils.cpp",
"GISel/AArch64InstructionSelector.cpp",
"GISel/AArch64LegalizerInfo.cpp",
+ "GISel/AArch64O0PreLegalizerCombiner.cpp",
"GISel/AArch64PostLegalizerCombiner.cpp",
"GISel/AArch64PostLegalizerLowering.cpp",
"GISel/AArch64PostSelectOptimize.cpp",